Texas Instruments LM3242 6MHz, 750mA Miniature, Adjustable, Step-Down DC-DC EVM LM3242TM-EV/NOPB LM3242TM-EV/NOPB 데이터 시트
제품 코드
LM3242TM-EV/NOPB
SNOSB48D – OCTOBER 2011 – REVISED MARCH 2013
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Reduce the amount of switching current that circulates through the ground plane: Connect the ground bumps
of the LM3242 and its input filter capacitor together using generous component-side copper fill as a pseudo-
ground plane. Then connect this copper fill to the system ground-plane (if one is used) with multiple vias.
These multiple vias help to minimize ground bounce at the LM3242 by giving it a low-impedance ground
connection.
of the LM3242 and its input filter capacitor together using generous component-side copper fill as a pseudo-
ground plane. Then connect this copper fill to the system ground-plane (if one is used) with multiple vias.
These multiple vias help to minimize ground bounce at the LM3242 by giving it a low-impedance ground
connection.
To minimize coupling to the DC-DC converter’s own voltage feedback trace:
•
•
Route noise sensitive traces, such as the voltage feedback path, as directly as possible from the switcher FB
pad to the VOUT pad of the output capacitor, but keep it away from noisy traces between the power
components.
pad to the VOUT pad of the output capacitor, but keep it away from noisy traces between the power
components.
To decouple common power supply lines, series impedances may be used to strategically isolate circuits:
•
•
Take advantage of the inherent inductance of circuit traces to reduce coupling among function blocks, by way
of the power supply traces.
of the power supply traces.
•
Use star connection for separately routing VBATT to PVIN and VBATT_PA.
•
Inserting a single ferrite bead in-line with a power supply trace may offer a favorable tradeoff in terms of
board area, by allowing the use of fewer bypass capacitors.
board area, by allowing the use of fewer bypass capacitors.
Manufacturing Considerations
The LM3242 package employs a 9-bump (3x3) array of 250 micron solder balls, with a 0.4mm pad pitch. A few
simple design rules will go a long way to ensuring a good layout.
•
simple design rules will go a long way to ensuring a good layout.
•
Pad size should be 0.225 ± 0.02 mm. Solder mask opening should be 0.325 ± 0.02 mm.
•
As a thermal relief, connect to each pad with 7 mil wide, 7 mil long traces, and incrementally increase each
trace to its optimal width. Symmetry is important to ensure the solder bumps re-flow evenly (refer to TI
Application Note AN-1112 DSBGA Wafer Level Chip Scale Package).
trace to its optimal width. Symmetry is important to ensure the solder bumps re-flow evenly (refer to TI
Application Note AN-1112 DSBGA Wafer Level Chip Scale Package).
LM3242 Evaluation Board
The following figures are drawn from a 4-layer board design, with notes added to highlight specific details of the
DC-DC switching converter section.
DC-DC switching converter section.
Figure 32. Simplified LM3242 RF Evaluation Board Schematic
1. Bulk Input Capacitor C2 should be placed closer to LM3242 than C1.
2. Add a 1nF (C1) on input of LM3242 for high frequency filtering.
3. Bulk Output Capacitor C3 should be placed closer to LM3242 than C4.
4. Add a 1nF (C4) on output of LM3242 for high frequency filtering.
5. Connect both GND terminals of C1 and C4 directly to System GND layer of phone board.
6. Connect bumps SGND (A2), NC (B2), BPEN (C1) directly to System GND.
7. Use 0402 caps for both C2 and C3 due to better high frequency filtering characteristics over 0603 capacitors.
8. TI has seen some improvement in high frequency filtering for small bypass caps (C1 and C4) when they are
connected to System GND instead of same ground as PGND. These capacitors should be 01005 case size
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