Texas Instruments BUF08832 Evaluation Module BUF08832EVM BUF08832EVM 데이터 시트
제품 코드
BUF08832EVM
BUF08832EVM Hardware Overview
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3.7
BUF08832_Test_Board Features
This section describes some of the hardware features present on the BUF08832_Test_Board.
3.7.1
JMP1: I
2
C Address Hardware Setting
Jumper JMP1 is used to set the hardware setting for the A0 I
2
C address pin on the BUF08832. Using
JMP1, the A0 address can be set to either a logic '1' or a logic '0' to allow for two unique I
2
C addresses.
See
for more details about how to configure the BUF08832EVM software to match the JMP1
hardware setting.
3.7.2
BKSEL: OTP Bank Selection
The BKSEL switch (illustrated in
) located on the BUF08832_Test_Board selects the memory
bank to be used when operating the EVM. Bank 0 selects the gamma curve that is stored in Bank_0 of the
BUF08832. Bank 1 selects the gamma curve that is stored in Bank_1 of the BUF08832.
BUF08832. Bank 1 selects the gamma curve that is stored in Bank_1 of the BUF08832.
Figure 9. BKSEL Switch
3.7.3
JMP2: BKSEL Control Setting
Jumper JMP2 determines how the OTP memory bank selection is controlled. There are two settings JMP2
can be set to. Position INT specifies that control of the BKSEL pin is handled on the BUF08832EVM. For
this jumper setting, the BKSEL switch controls whether Bank 0 or Bank 1 OTP is selected.
can be set to. Position INT specifies that control of the BKSEL pin is handled on the BUF08832EVM. For
this jumper setting, the BKSEL switch controls whether Bank 0 or Bank 1 OTP is selected.
The EXT position for JMP2 allows for an external control signal connected to terminal T3 to determine the
selection of which OTP bank to be used.
selection of which OTP bank to be used.
3.7.4
JMP3: VSD Control Setting
Jumper JMP3 selects where the BUF08832 digital supply pin is connected. If JMP3 is set in the INT
position, the V
position, the V
SD
pin is connected to the switchable V
DUT
signal generated from the USB_DIG_Platform.
This voltage can be set to either 3.3V or 5V depending on how JUMP9 on the USB_DIG_Platform is set.
While JMP3 is set to the INT position, the V
While JMP3 is set to the INT position, the V
SD
Power button on the BUF08832 software is able to control
whether the V
DUT
supply voltage is turned on or off.
When JMP3 is set in the EXT position, an external supply connected to terminal T1 can be used to
provide the digital supply voltage for the BUF08832.
provide the digital supply voltage for the BUF08832.
3.7.5
JMP4: I
2
C SCK Control Setting
Jumper JMP4 selects where the BUF08832 I
2
C SCL pin is connected. If JMP4 is set in the INT position,
the I
2
C clock signal is generated from the I
2
C_SCK_ISO signal from the USB_DIG_Platform.
When JMP4 is set in the EXT position, an external source connected to SCL pin of terminal T2 can be
used to provide the I
used to provide the I
2
C SCK signal for the BUF08832.
14
BUF08832EVM User Guide and Software Tutorial
SBOU081 – November 2009
Copyright © 2009, Texas Instruments Incorporated