Texas Instruments TAS5504-5142V4 Evaluation Module TAS5504-5142V4EVM TAS5504-5142V4EVM 데이터 시트
제품 코드
TAS5504-5142V4EVM
www.ti.com
2.3
Control Interface (J40)
Control Interface (J40)
This interface connects the TAS5504-5142V4EVM board to a TI input-USB board.
Table 2-4. J40 Pin Description
PIN
NET NAME
DESCRIPTION
NO.
AT SCHEMATICS
1
GND
Ground
2
RESERVED
3
GND
Ground
System reset (bidirectional). Activate MUTE before RESET for quiet
4
RESET
reset
Backend error (or soft reset) provides reduced click and pop reset,
5
BKND-ERR
without resetting I
2
C volume register settings.
Ramp volume from any setting to noiseless soft mute. Mute also can
6
MUTE
be activated by I
2
C.
Power down. TAS5504A goes to the power-down state when
7
PDN
activated.
8
RESERVED
9
RESERVED
10
SDA
I
2
C bit clock
11
GND
Ground
12
SCL
I
2
C bit clock
13
RESERVED
14
RESERVED
15
RESERVED
16
RESERVED
17
GND
Ground
18
RESERVED
19
RESERVED
Shutdown error reporting for all channels. Activated if TAS5142 has
20
SD
high current or high temperature. See Chapter 3: Protection.
21
RESERVED
Temperature warning. Activated if TAS5142 has reached
22
OTW
temperature warning level.
23
RESERVED
24
RESERVED
25
GND
Ground
26
GND
Ground
27
RESERVED
28
RESERVED
29
RESERVED
30
RESERVED
31
GND
Ground
32
GND
Ground
33
+5 V
+5Vdc power supply (output)
34
+5 V
+5Vdc power supply (output)
System Interfaces
14
SLEU075 – June 2006 – Revised June 2006