Texas Instruments TLK10002SMAEVM Evaluation Module TLK10002SMAEVM TLK10002SMAEVM 데이터 시트
제품 코드
TLK10002SMAEVM
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
B
NA
6522851
REGULATORS
3
15
REV
PAGE
DOCUMENT NUMBER
SIZE
of
PAGE TITLE
TEXAS INSTRUMENTS
C
3
7
6
8
u
F
C
4
1
4
.7
u
F
R
4
1
4
.9
9
K
C
2
4
1
u
F
C
1
5
1
u
F
U10
TPS74401RGW
OUT1
1
OUT2
18
OUT3
19
OUT4
20
IN1
5
IN2
6
IN3
7
IN4
8
PG
9
BIAS
10
EN
11
GND
12
GND_PP
21
SS
15
FB
16
NC1
2
NC2
3
NC3
4
NC4
13
NC5
14
NC6
17
C
1
4
4
.7
u
F
R63
2.80K
C
4
4
1
0
u
F
U9
TPS74401RGW
OUT1
1
OUT2
18
OUT3
19
OUT4
20
IN1
5
IN2
6
IN3
7
IN4
8
PG
9
BIAS
10
EN
11
GND
12
GND_PP
21
SS
15
FB
16
NC1
2
NC2
3
NC3
4
NC4
13
NC5
14
NC6
17
C
2
3
1
0
u
F
R
4
6
2
.4
9
K
C31
0.001uF
R
4
2
3
.5
7
K
R66
27
C
2
5
1
0
0
u
F
JMP1
DISABLE
1
2
C
1
8
1
u
F
Q19
FDV301N
G
S
D
R
5
8
3
.5
7
K
C
1
6
6
8
u
F
R
4
7
0
JMP5
DISABLE
1
2
C
2
6
4
.7
u
F
C
3
4
1
u
F
R
6
1
0
R
5
5
4
.9
9
K
R56
27
R
4
9
0
U7
TPS74401RGW
OUT1
1
OUT2
18
OUT3
19
OUT4
20
IN1
5
IN2
6
IN3
7
IN4
8
PG
9
BIAS
10
EN
11
GND
12
GND_PP
21
SS
15
FB
16
NC1
2
NC2
3
NC3
4
NC4
13
NC5
14
NC6
17
R52
4.75K
R51
1.65K
C
2
8
6
8
u
F
C46
0.001uF
R53
20
U8
TPS74401RGW
OUT1
1
OUT2
18
OUT3
19
OUT4
20
IN1
5
IN2
6
IN3
7
IN4
8
PG
9
BIAS
10
EN
11
GND
12
GND_PP
21
SS
15
FB
16
NC1
2
NC2
3
NC3
4
NC4
13
NC5
14
NC6
17
R
4
3
4
.9
9
K
C
4
3
6
8
u
F
C
4
2
1
u
F
C
1
7
1
0
u
F
JMP6
DISABLE
1
2
R64
4.75K
JMP2
DISABLE
1
2
R
5
7
4
.9
9
K
C
2
7
1
u
F
C
3
8
1
0
u
F
C33
0.001uF
R65
107
C
2
2
6
8
u
F
R
4
4
3
.5
7
K
C
3
5
1
0
0
u
F
Q16
FDV301N
G
S
D
R
4
5
4
.9
9
K
C47
0.001uF
C
2
1
1
u
F
JMP3
DISABLE
1
2
R
6
2
0
C
2
0
4
.7
u
F
R
6
0
2
.4
9
K
Q15
FDV301N
G
S
D
C
3
0
1
u
F
C
3
9
1
u
F
U11
TPS74401RGW
OUT1
1
OUT2
18
OUT3
19
OUT4
20
IN1
5
IN2
6
IN3
7
IN4
8
PG
9
BIAS
10
EN
11
GND
12
GND_PP
21
SS
15
FB
16
NC1
2
NC2
3
NC3
4
NC4
13
NC5
14
NC6
17
R54
107
R
5
9
4
.9
9
K
JMP4
3 Pin Berg
1
2
3
Q18
FDV301N
G
S
D
C
4
0
1
0
0
u
F
Q17
FDV301N
G
S
D
C
1
9
1
0
0
u
F
C
3
6
4
.7
u
F
R50
2.80K
C
1
3
1
0
0
u
F
R
4
8
0
C
4
5
1
u
F
C32
0.001uF
C
2
9
1
0
u
F
1
P
8
V
_R
E
G
_T
R
IM
1
P
8
V
_R
E
G
_
A
D
J
1
P
8
V
_R
E
G
_S
S
2
P
5
V
_R
E
G
_A
D
J
2
P
5
V
_R
E
G
_S
S
2
P
5
V
_R
E
G
_T
R
IM
3
P
3
V
_R
E
G
_S
S
3
P
3
V
_R
E
G
_
A
D
J
3
P
3
V
_R
E
G
_T
R
IM
1
P
2
V
_R
E
G
_S
S
1
P
2
V
_R
E
G
_
A
D
J
1
P
2
V
_R
E
G
_T
R
IM
1
P
2
V
G
_R
E
G
_S
S
1
P
2
V
G
_R
E
G
_A
D
J
1
P
2
V
G
_R
E
G
_
T
R
IM
G
R
D
_2
P
5
V
2P5V_REG_EN
G
R
D
_3
P
3
V
3P3V_REG_EN
G
R
D
_1
P
8
V
1P8V_REG_EN
G
R
D
_1
P
2
V
_G
1P2VG_REG_EN
G
R
D
_1
P
2
V
1P2V_REG_EN
GLOBAL_REGULATOR_DISABLE
1P8V
5V
2P5V
5V
3P3V
5V
1P2V
5V
1P2V_GTP
5V
5V
1.8V REGULATOR
2.5V REGULATOR
3.3V REGULATOR
1.2V REGULATOR
1.2V GTP REGULATOR
SILKSCREEN "ENABLED"
SILKSCREEN "DISABLED"
TLK10002EVM FPGA Daughterboard Schematics
Figure 41. Regulators, Sheet 3 of 15
55
SLLU148
–
May 2011
TLK10002 Dual-Channel, 10-Gbps, Multi-Rate Transceiver Evaluation Module
Copyright
©
2011, Texas Instruments Incorporated