Texas Instruments TPS40193 Evaluation Module, 12 Vin, 1.8 Vout, up to 10A TPS40193EVM-001 TPS40193EVM-001 데이터 시트
제품 코드
TPS40193EVM-001
www.ti.com
4
General Configuration and Description
4.1
Adjusting Output Voltage (R7)
V
= V
VOUT
VREF
´
R + R
R
8
7
7
(1)
4.2
Adjusting Short-Circuit Protection (R9)
General Configuration and Description
This section reviews the general configurations for using the TPS40193EVM-001.
The regulated output voltage can be adjusted within a limited range by changing the ground resistor in the
feedback resistor divider (R7). The output voltage is given by the formula shown in
feedback resistor divider (R7). The output voltage is given by the formula shown in
where:
•
V
VREF
= 0.591V and
•
R
8
= 20k
Ω
contains common values for R7 to generate popular output voltages. The TPS40193EVM-001 is
stable through these output voltages, but efficiency may suffer because the power stage is optimized for
1.8V output.
1.8V output.
Table 2. Adjusting V
OUT
with R7
V
OUT
R7 (k
Ω
)
3.3V
4.32
2.5V
6.19
2.25V
7.15
2.0V
8.25
1.8V
9.76
1.5V
13.0
1.2V
19.1
1.0V
28.7
0.9V
38.3
The values in
provide less than 1% nominal set-point error in the output voltage. If a tighter
nominal value is required, R5 can be used in parallel with R7 to obtain a wider range of resistor values,
using commonly-available E96 resistors.
using commonly-available E96 resistors.
The TPS40193 uses a selectable current limit for short-circuit protection. The current limit is selected from
three predefined levels by placing a resistor at R9. The TPS40193 compares the voltage drop across the
high-side FET (VDD to SW) to an internal reference voltage selected during start-up.
three predefined levels by placing a resistor at R9. The TPS40193 compares the voltage drop across the
high-side FET (VDD to SW) to an internal reference voltage selected during start-up.
shows the
voltage levels.
Table 3. Adjusting V
SCP
with R9
V
SCP
(min)
R7 (k
Ω
)
88mV
3.9
160mV
Open
228mV
12
The current before declaring short-circuit protection can be determined by dividing the V
SCP
by the R
DS(ON)
of the high-side FET (Q2)
SLUU274 – May 2007
Using the TPS40193EVM-001
5