Texas Instruments DS100BR210EVK Evaluation Module DS100BR210EVK/NOPB DS100BR210EVK/NOPB 데이터 시트
제품 코드
DS100BR210EVK/NOPB
SNLS338E – JANUARY 2011 – REVISED FEBRUARY 2013
FUNCTIONAL DESCRIPTION
The DS100BR111 is a high performance circuit capable of delivering excellent performance. Careful attention
must be paid to the details associated with high-speed design as well as providing a clean power supply. Refer
to the information below and Revision 4 of the LVDS Owner's Manual for more detailed information on high
speed design tips to address signal integrity design issues.
must be paid to the details associated with high-speed design as well as providing a clean power supply. Refer
to the information below and Revision 4 of the LVDS Owner's Manual for more detailed information on high
speed design tips to address signal integrity design issues.
The control pins have been enhanced to have 4 different levels and provide a wider range of control settings.
Refer to
Refer to
Table 1. 4-Level Control Pin Settings
Pin Setting
Description
0
Tie pin to GND through a 1 K
Ω
resistor
R
Tie pin to ground through 20 K
Ω
resistor
Float
Float the pin (no connection)
1
Tie pin to VDD through a 1 K
Ω
resistor
NOTE
4-Level IO pins require a 1K resistance to GND or VDD/VIN. It is possible to tie mulitple 4-
level IO pins together with a single resistor to GND or VDD/VIN. When multiple IOs are
connected in parallel, the resistance to GND or VDD/VIN should be adjusted to
compensate. For 2 pins the optimal resistance is 500 Ohms, 3 pins = 330 Ohms, and 4
pins = 250 Ohms.
level IO pins together with a single resistor to GND or VDD/VIN. When multiple IOs are
connected in parallel, the resistance to GND or VDD/VIN should be adjusted to
compensate. For 2 pins the optimal resistance is 500 Ohms, 3 pins = 330 Ohms, and 4
pins = 250 Ohms.
NOTE
For 2.5V mode the control pin logic 1 level is VDD (pins 21 and 22), in 3.3V mode the
control pin logic 1 level is defined by VIN (pin 15).
control pin logic 1 level is defined by VIN (pin 15).
Table 2. Equalizer Settings
EQA1/EQB
Level
EQA0/EQB0
EQ — 8 bits [7:0]
dB Boost at 5 Ghz
Suggested Media
1
1
0
0
0000 0000 = 0x00
2.5
FR4 < 5 inch trace
2
0
R
0000 0001 = 0x01
6.5
FR4 5 inch trace
3
0
Float
0000 0010 = 0x02
9
FR4 10 inch trace
4
0
1
0000 0011 = 0x03
11.5
FR4 15 inch trace
5
R
0
0000 0111 = 0x07
14
FR4 20 inch trace
6
R
R
0001 0101 = 0x15
15
FR4 25 inch trace
7
R
Float
0000 1011 = 0x0B
17
FR4 25 inch trace
8
R
1
0000 1111 = 0x0F
19
7m 30AWG Cable
9
Float
0
0101 0101 = 0x55
20
FR4 30 inch trace
10
Float
R
0001 1111 = 0x1F
23
8m 30 AWG Cable
FR4 35 inch trace
11
Float
Float
0010 1111 = 0x2F
25
10m 30 AWG Cable
12
Float
1
0011 1111 = 0x3F
27
10m - 12m, Cable
13
1
0
1010 1010 = 0xAA
30
14
1
R
0111 1111 = 0x7F
31
15
1
Float
1011 1111 = 0xBF
33
16
1
1
1111 1111 = 0xFF
34
12
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