Texas Instruments PGA870EVM Evaluation Module PGA870EVM PGA870EVM 데이터 시트
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PGA870EVM
Introduction
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1
Introduction
The PGA870 is a wideband PGA (available in a QFN-28 package) that has been optimized to provide high
bandwidth, low distortion, and low noise, making it ideally suited as a 14-bit analog-to-digital converter
(ADC) driver for wireless base station signal chain applications. The wide gain range of –11.5 dB to +20
dB can be adjusted in 0.5-dB gain steps through a 6-bit control word applied to the parallel interface.
bandwidth, low distortion, and low noise, making it ideally suited as a 14-bit analog-to-digital converter
(ADC) driver for wireless base station signal chain applications. The wide gain range of –11.5 dB to +20
dB can be adjusted in 0.5-dB gain steps through a 6-bit control word applied to the parallel interface.
The PGA870 evaluation fixture supports the feature and performance evaluations of the PGA870. The
evaluation fixture has onboard switches for device power-up and power-down, gain setting, and gain latch
modes. The PGA870EVM has SMA connectors for input and output signals and a DB25 connector to
allow gain control via an external control source. Also included in the evaluation kit is an additional
interface board that allows the user to control the PGA870 gain from an external USB interface, as well as
graphical user interface (GUI) software that allows the user to remotely set the device gain. The PGA870
evaluation fixture requires a +5-V power supply.
evaluation fixture has onboard switches for device power-up and power-down, gain setting, and gain latch
modes. The PGA870EVM has SMA connectors for input and output signals and a DB25 connector to
allow gain control via an external control source. Also included in the evaluation kit is an additional
interface board that allows the user to control the PGA870 gain from an external USB interface, as well as
graphical user interface (GUI) software that allows the user to remotely set the device gain. The PGA870
evaluation fixture requires a +5-V power supply.
Throughout this document, the acronym EVM and the phrases evaluation module and evaluation fixture
are synonymous with the PGA870EVM.
are synonymous with the PGA870EVM.
1.1
PGA870EVM Kit Contents
The PGA870EVM kit contains:
•
PGA870EVM printed circuit board (PCB)
•
PGA870 USB Interface board
•
USB interface cable
•
CD with this document, the GUI software installer, and USB drivers
2
EVM Overview
The PGA870 evaluation fixture contains onboard switches (S3 to S9) to support manual gain selection as
well as device power-up and power-down (S2). The EVM also has connectors (J3 to J8). Onboard jumper
blocks (JP1 to JP10) allow selection of either the onboard switches or the connectors for off-board control.
well as device power-up and power-down (S2). The EVM also has connectors (J3 to J8). Onboard jumper
blocks (JP1 to JP10) allow selection of either the onboard switches or the connectors for off-board control.
summarizes the switch numbers and corresponding device features. Note that switches S1 to S9
put the corresponding device pins into a high state when the switch actuator is positioned towards the
center of the board.
center of the board.
Table 1. PGA870EVM Switch Number and Corresponding Device Feature/Function
(1)
EVM Switch
Device Function
Description
Jumper
EVM Connector
S1
Latch Mode
Controls latched and unlatched acquisition of
JP9
J8, Pin 9
the gain-control word (B0 to B5). See the
for additional information.
S2
PD
A low signal disables the device analog
JP10
J8, Pin 17
(labeled Disable on EVM)
circuitry and shuts down the forward gain
path. Gain control CMOS circuitry remains
active when PD is low, so the gain can be set
when the device is disabled.
path. Gain control CMOS circuitry remains
active when PD is low, so the gain can be set
when the device is disabled.
S3
Gain Strobe
Latches gain control data (B0 to B5)
JP1 JP8
J3 (SMA)
(labeled Clock on EVM)
depending on the Latch Mode state. See the
for additional information.
S4
B5
Gain control word MSB. A low/high signal will
JP2
J8, Pin 7
decrease/increase the gain by 16 dB
S5
B4
Gain control word bit 4. A low/high signal will
JP3
J8, Pin 6
decrease/increase the gain by 8 dB
S6
B3
Gain control word bit 3. A low/high signal will
JP4
J8, Pin 5
decrease/increase the gain by 4 dB
S7
B2
Gain control word bit 2. A low/high signal will
JP5
J8, Pin 4
decrease/increase the gain by 2 dB
S8
B1
Gain control word bit 1. A low/high signal will
JP6
J8, Pin 3
decrease/increase the gain by 1 dB
(1)
Switches S1 to S9 give a high state to the corresponding device pins when the switch actuator is positioned towards the center
of the board.
of the board.
2
PGA870EVM
SBOU082A – December 2009 – Revised February 2010
Copyright © 2009–2010, Texas Instruments Incorporated