Texas Instruments EKS-LM3S1968 Evaluation Kit with Code Composer Studio EKS-LM3S1968 EKS-LM3S1968 데이터 시트

Debug Mode 3 supports evaluation board debugging using an external debug interface. Mode 3 is 
automatically selected when a device such as a Segger J-Link or Keil ULINK is connected.

Boards marked Revision B or later automatically configure pin 1 to be a 3.3-V reference, if an 
external debugger is connected. To determine the revision of your board, locate the product 
number on the bottom of the board; for example, EK-LM3S6965-B. The last character of the 
product number identifies the board revision.

A configuration or board-level change may be necessary when using an external debug interface 
with revision A of this evaluation board. Because the evaluation board supports both debug out 
and debug in modes, pin 1 of the 20-pin JTAG/SWD header is, by default, not connected to +3.3 V. 
Consequently, devices requiring a voltage on pin 1 to power their line buffers may not work.

Two solutions exist. Some debugger interfaces (such as ULINK) have an internal power jumper 
that, in this case, should be set to internal +3.3-V power. Refer to debugger interface 
documentation for full details. However, if your debugger interface does not have a selectable 
power source, it may be necessary to install a 0-

Ω

 resistor on the evaluation board to route power 

to pin 1. Refer to the schematics and board drawing in the appendix of this manual for the location 
of this resistor.

An FT2232 device from Future Technology Devices International Ltd manages USB-to-serial 
conversion. The FT2232 is factory-configured to implement a JTAG/SWD port (synchronous 
serial) on channel A and a Virtual COM Port (VCP) on channel B. This feature allows two 
simultaneous communications links between the host computer and the target device using a 
single USB cable. Separate Windows drivers for each function are provided on the Documentation 
and Software CD.

A small serial EEPROM holds the FT2232 configuration data. The EEPROM is not accessible by 
the LM3S1968 microcontroller.

For full details on FT2232 operation, go to 

www.ftdichip.com

.

The FT2232 USB device performs JTAG/SWD serial operations under the control of the debugger. 
A CPLD (U6) multiplexes SWD and JTAG functions and, when working in SWD mode, provides 
direction control for the bidirectional data line. The CPLD also implements logic to select between 
the three debug modes. The target microcontroller selection is determined by multiplexing 
TCK/SWCLK

 and asserting TRST.

In Hibernate state, the JTAG/SWD interface circuit remains powered. Although debugging is not 
possible, maintaining power avoids re-enumeration of the USB device after each wake transition. 
To avoid powering the microcontroller, the CPLD sets its output signals to a high-impedance state 
whenever the Hibernation signal is asserted.

The Virtual COM Port (VCP) allows Windows applications (such as HyperTerminal) to 
communicate with UART0 on the LM3S1968 over USB. Once the FT2232 VCP driver is installed, 
Windows assigns a COM port number to the VCP channel.