Texas Instruments Evaluation Module for Integrated 3.3V / 5V Power LDO with Clock Output TPS51103EVM TPS51103EVM 데이터 시트

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TPS51103EVM
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TPS51103EVM Electrical Performance Specifications
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TPS51103EVM Electrical Performance Specifications
Table 1. Electrical Performance Specifications
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
INPUT CHARACTERISTICS
V
IN
Input voltage range
5.5
28
V
OUTPUT1 (5V_OUT)
Output voltage
5
V
Load regulation
0 A < I
OUT1
< 100 mA, V
IN
= 12 V
5%
Output load current
I
OUT1
0
100
mA
Output overcurrent
160
OUTPUT1 (3.3V_OUT)
Output voltage
3.3
V
Load regulation
0 A < I
OUT2
< 100 mA, V
IN
= 12 V
5%
Output load current
0
100
mA
Output overcurrent
150
OUTPUT1 (3.3V_RTC)
Output voltage
3.3
V
Load regulation
0 A < I
OUT3
< 5 mA, V
IN
= 12 V
5%
Output load current
I
OUT3
0
5
mA
OUTPUT1 (15V_OUT)
Output voltage
12
V
Output load current
0
10
mA
SLUU303A – JUNE 2008 – Revised SEPTEMBER 2008 Using the TPS51103EVM Integrated 3.3-V/5-V Power LDO with Clock Output
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