Texas Instruments IC MCU 16B MSP430F2232TDA TSSOP-38 TID MSP430F2232TDA 데이터 시트
제품 코드
MSP430F2232TDA
MSP430F22x2
MSP430F22x4
MSP430F22x4
SLAS504G – JULY 2006 – REVISED AUGUST 2012
Peripherals
Peripherals are connected to the CPU through data, address, and control buses and can be handled using all
instructions. For complete module descriptions, see the MSP430x2xx Family User's Guide (
instructions. For complete module descriptions, see the MSP430x2xx Family User's Guide (
).
Oscillator and System Clock
The clock system is supported by the basic clock module that includes support for a 32768-Hz watch crystal
oscillator, an internal very-low-power low-frequency oscillator, an internal digitally-controlled oscillator (DCO), and
a high-frequency crystal oscillator. The basic clock module is designed to meet the requirements of both low
system cost and low power consumption. The internal DCO provides a fast turn-on clock source and stabilizes in
less than 1 µs. The basic clock module provides the following clock signals:
•
oscillator, an internal very-low-power low-frequency oscillator, an internal digitally-controlled oscillator (DCO), and
a high-frequency crystal oscillator. The basic clock module is designed to meet the requirements of both low
system cost and low power consumption. The internal DCO provides a fast turn-on clock source and stabilizes in
less than 1 µs. The basic clock module provides the following clock signals:
•
Auxiliary clock (ACLK), sourced from a 32768-Hz watch crystal, a high-frequency crystal, or the internal very-
low-power LF oscillator.
low-power LF oscillator.
•
Main clock (MCLK), the system clock used by the CPU.
•
Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.
Table 14. DCO Calibration Data
(Provided From Factory in Flash Information Memory Segment A)
DCO FREQUENCY
CALIBRATION REGISTER
SIZE
ADDRESS
CALBC1_1MHZ
byte
010FFh
1 MHz
CALDCO_1MHZ
byte
010FEh
CALBC1_8MHZ
byte
010FDh
8 MHz
CALDCO_8MHZ
byte
010FCh
CALBC1_12MHZ
byte
010FBh
12 MHz
CALDCO_12MHZ
byte
010FAh
CALBC1_16MHZ
byte
010F9h
16 MHz
CALDCO_16MHZ
byte
010F8h
Brownout
The brownout circuit is implemented to provide the proper internal reset signal to the device during power on and
power off.
power off.
Digital I/O
There are four 8-bit I/O ports implemented—ports P1, P2, P3, and P4:
•
•
All individual I/O bits are independently programmable.
•
Any combination of input, output, and interrupt condition is possible.
•
Edge-selectable interrupt input capability for all eight bits of port P1 and P2.
•
Read/write access to port-control registers is supported by all instructions.
•
Each I/O has an individually programmable pullup/pulldown resistor.
Because there are only three I/O pins implemented from port P2, bits [5:1] of all port P2 registers read as 0, and
write data is ignored.
write data is ignored.
Watchdog Timer (WDT+)
The primary function of the WDT+ module is to perform a controlled system restart after a software problem
occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not needed
in an application, the module can be disabled or configured as an interval timer and can generate interrupts at
selected time intervals.
occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not needed
in an application, the module can be disabled or configured as an interval timer and can generate interrupts at
selected time intervals.
Copyright © 2006–2012, Texas Instruments Incorporated
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