Texas Instruments FPD Link III - DS90UB901Q & DS90UB902Q EVK SERDESUB-16USB/NOPB SERDESUB-16USB/NOPB 데이터 시트

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SERDESUB-16USB/NOPB
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SERDESUB-16USB User’s Guide  
 
 
 
 
            
 
 
SNLU100 – April 2012 
 
Display Mode: 
 
In Display mode, I2C transactions originate from the controller attached to the Serializer. 
The I2C slave core in the Serializer will detect if a transaction targets (local) registers 
within the Serialier or the (remote) registers within the Deserializer or a remote slave 
connected to the I2C master interface of the Deserializer. Commands are sent over the 
forward channel link to initiate the transactions. The Deserializer will receive the command 
and generate an I2C transaction on its local I2C bus. At the same time, the Deserializer 
will capture the response on the I2C bus and return the response as a command on the bi-
directional control channel. The Serializer parses the response and passes the appropriate 
response to the Serializer I2C bus. 
 
Note:
 The default settings for this EVK are shipped with a camera mode configuration, but 
this EVK also supports a display mode. This mode is suitable for setups where a host 
controller is connected to the DS90UB901Q Serializer end and a display module is 
connected to the DS90UB902Q Deserializer end. The I2C Master would need to be 
connected to the DS90UB901Q Serializer end. A typical setup for display mode is shown 
below: 
 
DS90UB902Q
Deserializer
SCL
SDA
PDB
RIN
+
-
ID[x]
PASS
LOCK
ROUT[13:0]
HS,VS
PCLK
1.8V
10k
0
1.0k
1.0k
VDDIO
GPIO0
GPIO1
MODE (M_S)
DS90UB901Q
Serializer
SCL
SDA
PDB
VDDIO
DOUT
+
-
ID[x]
DIN[13:0]
HS,VS
PCLK
1.8V
10k
0
1.0k
1.0k
VDDIO
GPIO0
GPIO1
RES0
VDDIO
0xB0
0xC0
0xA0
BISTEN, RES0
1.8V 3.3V
VDD
18
V
DDI
O
1.8V 3.3V
VDD
18
V
DDI
O
(3.3V I/O)
(3.3V I/O)
GPU/FPGA 
Host
SCL
SDA
VDDIO
MODE (M_S)
Timing Controller
C
LCD
Display
 
Figure 7. Example of DS90UB901Q/902Q in Display Application