Texas Instruments IC MCU 16B MSP430F2111IRGET VQFN-24 TID MSP430F2111IRGET 데이터 시트
제품 코드
MSP430F2111IRGET
MSP430F21x1
SLAS439F
–
SEPTEMBER 2004
–
REVISED AUGUST 2011
Special Function Registers
Most interrupt and module enable bits are collected into the lowest address space. Special function register bits
not allocated to a functional purpose are not physically present in the device. Simple software access is provided
with this arrangement.
not allocated to a functional purpose are not physically present in the device. Simple software access is provided
with this arrangement.
Legend
rw
Bit can be read and written.
rw-0, 1
Bit can be read and written. It is Reset or Set by PUC.
rw-(0), (1)
Bit can be read and written. It is Reset or Set by POR.
SFR bit is not present in device.
Table 6. Interrupt Enable 1
Address
7
6
5
4
3
2
1
0
00h
ACCVIE
NMIIE
OFIE
WDTIE
rw-0
rw-0
rw-0
rw-0
WDTIE
Watchdog timer interrupt enable. Inactive if watchdog mode is selected. Active if watchdog timer is configured in interval
timer mode.
timer mode.
OFIE
Oscillator fault interrupt enable
NMIIE
(Non)maskable interrupt enable
ACCVIE
Flash access violation interrupt enable
Table 7. Interrupt Enable 2
Address
7
6
5
4
3
2
1
0
01h
Table 8. Interrupt Flag Register 1
Address
7
6
5
4
3
2
1
0
02h
NMIIFG
RSTIFG
PORIFG
OFIFG
WDTIFG
rw-0
rw-(0)
rw-(1)
rw-1
rw-(0)
WDTIFG
Set on watchdog timer overflow (in watchdog mode) or security key violation.
Reset on V
Reset on V
CC
power-up or a reset condition at RST/NMI pin in reset mode.
OFIFG
Flag set on oscillator fault
RSTIFG
External reset interrupt flag. Set on a reset condition at RST/NMI pin in reset mode. Reset on V
CC
power up.
PORIFG
Power-on reset interrupt flag. Set on V
CC
power up.
NMIIFG
Set via RST/NMI pin
Table 9. Interrupt Flag Register 2
Address
7
6
5
4
3
2
1
0
03h
Copyright
©
2004
–
2011, Texas Instruments Incorporated
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