Texas Instruments PGA113 Evaluation Module Rev B PGA113EVM-B PGA113EVM-B 데이터 시트

제품 코드

PGA113EVM-B

EVM Hardware Overview

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In some cases, the Windows Add Hardware Wizard starts. If this prompt appears, allow the system device
manager to install the human interface drivers by clicking Yes when requested to install drivers.

3.4

Powering the EVM

By default, a 0-

resistor (R1) is used to short DVDD and AVDD together, with both being supplied by the

SM-USB-DIG Platform. If a different supply is desired for AVDD, R1 can be removed and the supply can
be connected to the AVDD and GND test points. The SM-USB-DIG Plartform can supply 5 V or 3.3 V to
the EVM.

3.5

EVM Features

This section describes some of the hardware features present on the PGA112EVM and PGA113EVM
boards. Note that these two EVMs are identical except for the device name.

3.5.1

Communication Test Points

The PGA112EVM and PGA113EVM boards feature test points (CS, DIO, and CLK) for monitoring
communication between the SM-USB-DIG Platform and the PGA112 (or PGA113) device, as shown in

Figure 6

. The test points allow external signals to be connected if the EVM is integrated into a custom

application or prototype. Note that if the SM-USB-DIG Platofrm is not being used, an external power
source must be connected to DVDD and AVDD.

Figure 6. PGA112EVM Hardware

(Note that the PGA113EVM is identical except for the device name)

3.5.2

Output Test Points

Test point VOUT is used for measuring the output of the EVM.

3.5.3

Voltage Reference

For simplicity, the VREF input of the EVM is shorted to ground through 0-

resistor R2 by default. If a

different VREF is desired, R2 can be removed.

3.5.4

Analog Input Signals

Test points VCAL/CH0 and CH1 are used for connecting the input signals to the EVM, as shown in

Figure 6

PGA112EVM and PGA113EVM User’s Guide

SBOU073A – February 2009 – Revised May 2012

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