Microchip Technology TMPSNSRD-TCPL1 데이터 시트

© 2009-2012 Microchip Technology Inc.

DS22203C-page 13

The MCP9804 Serial Clock (SCL) input and the
bidirectional Serial Data (SDA) line form a 2-wire
bidirectional, Standard mode, I

2

C compatible

communication port (refer to the 

 and 

 tables).

The following bus protocol has been defined:

4.1.1

DATA TRANSFER

Data transfers are initiated by a Start condition
(START), followed by a 7-bit device address and a
read/write bit. An Acknowledge (ACK) from the slave
confirms the reception of each byte. Each access must
be terminated by a Stop condition (STOP). 

Repeated communication is initiated after t

B-FREE

. 

This device does not support sequential register read/
write. Each register needs to be addressed using the
Register Pointer.

This device supports the receive protocol. The register
can be specified using the pointer for the initial read.
Each repeated read or receive begins with a Start
condition and address byte. The MCP9804 retains the
previously selected register. Therefore, it outputs data
from the previously specified register (repeated pointer
specification is not necessary).

4.1.2

MASTER/SLAVE

The bus is controlled by a master device (typically a
microcontroller) that controls the bus access and
generates the Start and Stop conditions. The MCP9804
is a slave device and does not control other devices in
the bus. Both master and slave devices can operate as
either transmitter or receiver. However, the master
device determines which mode is activated. 

4.1.3

START/STOP CONDITION 

A high-to-low transition of the SDA line (while SCL is
high) is the Start condition. All data transfers must be
preceded by a Start condition from the master. A
low-to-high transition of the SDA line (while SCL is
high) signifies a Stop condition.

If a Start or Stop condition is introduced during data
transmission, the MCP9804 releases the bus. All data
transfers are ended by a Stop condition from the
master.

Master

The device that controls the serial bus, 
typically a microcontroller.

Slave

The device addressed by the master, 
such as the MCP9804.

Transmitter Device sending data to the bus.

Receiver

Device receiving data from the bus.

START

A unique signal from the master to 
initiate serial interface with a slave.

STOP

A unique signal from the master to 
terminate serial interface from a slave.

Read/Write

A read or write to the MCP9804 
registers.

ACK

A receiver Acknowledges (ACK) the 
reception of each byte by polling the bus.

NAK

A receiver Not-Acknowledges (NAK) or 
releases the bus to show End-of-Data 
(EOD).

Busy

Communication is not possible 
because the bus is in use.

Not Busy

The bus is in the Idle state; both SDA 
and SCL remain high.

Data Valid

SDA must remain stable before SCL 
becomes high in order for a data bit to 
be considered valid. During normal 
data transfers, SDA only changes state 
while SCL is low.