Texas Instruments PGA450-Q1 Evaluation Module PGA450Q1EVM PGA450Q1EVM 데이터 시트
제품 코드
PGA450Q1EVM
List of Figures
1
PGA450-Q1 EVM Set-Up
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2
PGA450-Q1 With Transformer and Connector for Connecting the Transformer
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3
LIN Master Transceiver
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4
RS232 Transceiver
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5
Loading a .HEX File Into the GUI
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6
OTP Memory Successful Programming Verification
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7
OTP Memory can be programmed while programming the Development RAM
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8
Echo Data Stored in FIFO RAM Plotted in Excel
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9
LIN Master on GUI
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10
Evaluation Tab Setting
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11
Echo Analog Waveform Output (Channel1), Drive voltage (Channel 2)
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12
DAC Output of Filtered Signal (Channel 2) and Drive Voltage (Channel 1)
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13
Schematic, LIN
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14
Schematic, Power
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15
Schematic, RS232
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16
Schematic, USB Controller
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17
Schematic, PGA450-Q1
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18
PCB Layout, Bottom
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19
PCB Layout, Top
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List of Tables
1
Jumpers
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2
Default Jumper Settings
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3
Default 0-
Ω
Resistor Setting
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4
List of Figures
SLDU007A – March 2012 – Revised January 2013
Copyright © 2012–2013, Texas Instruments Incorporated