Texas Instruments PGA450-Q1 Evaluation Module PGA450Q1EVM PGA450Q1EVM 데이터 시트
제품 코드
PGA450Q1EVM
Jumper Settings
6
Jumper Settings
There are several jumpers and 0-
Ω
resistors located on the board, which are used to configure the
connections to the PGA450-Q1 and the rest of the EVM. The default settings and their effects are listed
below.
below.
6.1
Jumpers
shows the function of each specific jumper setting on the EVM.
Table 1. Jumpers
Reference
Jumper Setting
Function
Closed
VP_OTP power supply input on the PGA450-Q1 is connected to the 8-V voltage supply on the EVM.
VPWR:VOTP
Open
VP_OTP power supply input on the PGA450-Q1 is not connected to the 8-V voltage supply on the EVM.
Closed
VPWR is connected to V_LIN, which is the LIN bus voltage.
VPWR:VLIN
Open
VPWR is not connected to V_LIN, which is the LIN bus voltage.
Closed
The secondary of the transformer on the EVM is connected to the PGA450-Q1 on the EVM.
JP3
Open
The secondary of the transformer on the EVM is not connected to the PGA450-Q1 on the EVM.
The transformer primary top terminal is connected to the OUTA pin on PGA450-Q1, for push-pull
Closed
configuration.
(1)
JP4
Open
The transformer primary top terminal is not connected to the OUTA pin on PGA450-Q1.
The transformer primary top terminal is connected to the VREG pin on PGA450-Q1, for single-ended
Closed
configuration.
JP5
Open
The transformer primary top terminal is not connected to the VREG pin on PGA450-Q1.
(1)
The transformer provided with the EVM is push-pull. When using the single-ended configuration, JP4 must be disconnected and
JP5 must be closed
JP5 must be closed
6.2
Default Jumper Settings
Table 2. Default Jumper Settings
Reference
Jumper Position
Function
VPWR:VOTP
Open
VP_OTP power supply input on the PGA450-Q1 is not connected to the 8-V voltage supply on the EVM.
VPWR:VLIN
Closed
VPWR is connected to V_LIN, which is the LIN bus voltage.
JP3
Closed
The secondary of the transformer on the EVM is connected to PGA450-Q1 on the EVM.
The transformer primary terminal 1 is connected to the OUTA pin on the PGA450-Q1 for push-pull
JP4
Closed
configuration.
JP5
Open
The transformer primary terminal 1 is not connected to the VREG pin on the PGA450-Q.
6.3
0-
Ω
Resistors
The 0-
Ω
resistor R2 is used to connect the programming voltage to the PGA450-Q1 that is soldered to the
PCB. This resistor is not populated on the PCB. The soldered device has had the OTP programmed for
DEVRAM usage.
DEVRAM usage.
Table 3. Default 0-
Ω
Resistor Setting
Reference
Install
Function
R2
DNP
The VP_OTP pin of the device does not have OTP programming voltage.
Although they are installed to default settings in the factory, it is recommended that the user verify that the
jumpers and 0-
jumpers and 0-
Ω
resistors are installed to their default settings before powering on the EVM.
7
SLDU007A – March 2012 – Revised January 2013
PGA450-Q1 EVM User’s Guide
Copyright © 2012–2013, Texas Instruments Incorporated