Microchip Technology MCP1630DM-DDBS1 데이터 시트

DS41211D-page 108

©

 2007 Microchip Technology Inc.

Syntax:

[ label ]

RLF    f,d

Operands:

0 

≤

 f 

≤

 127

d 

∈

 [

0

,

1

]

Operation:

See description below

Status Affected:

C

Description:

The contents of register ‘f’ are 
rotated one bit to the left through 
the Carry flag. If ‘d’ is ‘

0

’, the 

result is placed in the W register. 
If ‘d’ is ‘

1

’, the result is stored 

back in register ‘f’.

Words:

1

Cycles:

1

Example:

RLF

REG1,0

Before Instruction

REG1

=

1110 0110

C

=

0

After Instruction

REG1

=

1110 0110

W

=

1100 1100

C

=

1

Syntax:

[ label ]    RRF   f,d

Operands:

0 

≤

 f 

≤

 127

d 

∈

 [

0

,

1

]

Operation:

See description below

Status Affected:

C

Description:

The contents of register ‘f’ are 
rotated one bit to the right through 
the Carry flag. If ‘d’ is ‘

0

’, the 

result is placed in the W register. 
If ‘d’ is ‘

1

’, the result is placed 

back in register ‘f’.

Register f

C

Register f

C

Syntax:

[ label ] SLEEP

Operands:

None

Operation:

00h 

→

 WDT,

0

 

→

 WDT prescaler,

1

 

→

 TO,

0

 

→

 PD

Status Affected:

TO, PD

Description:

The power-down Status bit, PD is 
cleared. Time-out Status bit, TO 
is set. Watchdog Timer and its 
prescaler are cleared.
The processor is put into Sleep 
mode with the oscillator stopped. 

Syntax:

[ label ] SUBLW   k

Operands:

0 

≤ 

k 

≤ 

255

Operation:

k - (W) 

→ (

W)

Status Affected: C, DC, Z

Description:

The W register is subtracted (2’s 
complement method) from the 
eight-bit literal ‘k’. The result is 
placed in the W register.

C = 

0

W 

>

 k

C = 

1

W 

≤

 k

DC = 

0

W<3:0> 

>

 k<3:0>

DC = 

1

W<3:0> 

≤

 k<3:0>