Microchip Technology MA330025-1 데이터 시트
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616G-page 126
2009-2012 Microchip Technology Inc.
4.4.2
EXTENDED X DATA SPACE
The lower half of the base address space range, between
0x0000 and 0x7FFF, is always accessible regardless of
the contents of the Data Space Page registers. It is
indirectly addressable through the register indirect
instructions. It can be regarded as being located in the
default EDS Page 0 (i.e., EDS address range of
0x000000 to 0x007FFF with the base address bit,
EA<15> = 0, for this address range). However, Page 0
cannot be accessed through the upper 32 Kbytes
(0x8000 to 0xFFFF) of Base Data Space, in combination
with DSRPAG = 0x00 or DSWPAG = 0x00.
Consequently, DSRPAG and DSWPAG are initialized to
0x001 at Reset.
0x0000 and 0x7FFF, is always accessible regardless of
the contents of the Data Space Page registers. It is
indirectly addressable through the register indirect
instructions. It can be regarded as being located in the
default EDS Page 0 (i.e., EDS address range of
0x000000 to 0x007FFF with the base address bit,
EA<15> = 0, for this address range). However, Page 0
cannot be accessed through the upper 32 Kbytes
(0x8000 to 0xFFFF) of Base Data Space, in combination
with DSRPAG = 0x00 or DSWPAG = 0x00.
Consequently, DSRPAG and DSWPAG are initialized to
0x001 at Reset.
The remaining pages including both EDS and PSV
pages are only accessible using the DSRPAG or
DSWPAG registers in combination with the upper
32 Kbytes, 0x8000 to 0xFFFF, of the base address,
where base address bit, EA<15> = 1.
For example, when DSRPAG = 0x01 or
DSWPAG = 0x01, accesses to the upper 32 Kbytes,
0x8000 to 0xFFFF, of the data space will map to the
EDS address range of 0x008000 to 0x00FFFF.
When DSRPAG = 0x02 or DSWPAG = 0x02,
accesses to the upper 32 Kbytes of the data space
will map to the EDS address range of 0x010000 to
0x017FFF and so on, as shown in the EDS memory
map in
pages are only accessible using the DSRPAG or
DSWPAG registers in combination with the upper
32 Kbytes, 0x8000 to 0xFFFF, of the base address,
where base address bit, EA<15> = 1.
For example, when DSRPAG = 0x01 or
DSWPAG = 0x01, accesses to the upper 32 Kbytes,
0x8000 to 0xFFFF, of the data space will map to the
EDS address range of 0x008000 to 0x00FFFF.
When DSRPAG = 0x02 or DSWPAG = 0x02,
accesses to the upper 32 Kbytes of the data space
will map to the EDS address range of 0x010000 to
0x017FFF and so on, as shown in the EDS memory
map in
.
For more information of the PSV page access using
Data Space Page registers refer to Section 4.5
“Program Space Visibility from Data Space” in
Section 4. “Program Memory” (DS70613) of the
“dsPIC33E/PIC24E Family Reference Manual”.
Data Space Page registers refer to Section 4.5
“Program Space Visibility from Data Space” in
Section 4. “Program Memory” (DS70613) of the
“dsPIC33E/PIC24E Family Reference Manual”.
FIGURE 4-7:
EDS MEMORY MAP
Note 1: DSxPAG should not be used to access
Page 0. An EDS access with DSxPAG
set to 0x000 will generate an address
error trap.
set to 0x000 will generate an address
error trap.
2: Clearing DSxPAG in software has no
effect.
0x008000
0x010000
0x018000
0xFE8000
0xFF0000
0xFF8000
SFR/DS
0x0000
0xFFFF
EDS EA Address (24 bits)
DS
Conventional
EA<15:0>
0x8000
(PAGE 0)
(DSWPAG<8:0>, EA<14:0>)
DSRPAG<9> = 0
DS Address
Page 1FD
Page 1FE
Page 1FF
Page 1
Page 2
Page 3
(DSRPAG<8:0>, EA<14:0>)