Microchip Technology MA330019 데이터 시트
© 2007-2012 Microchip Technology Inc.
DS70291G-page 199
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
13.0 TIMER2/3 AND TIMER4/5
Timer2 and Timer4 are Type B timers with the following
specific features:
• A Type B timer can be concatenated with a Type
specific features:
• A Type B timer can be concatenated with a Type
C timer to form a 32-bit timer
• The external clock input (TxCK) is always
synchronized to the internal device clock and the
clock synchronization is performed after the
prescaler
clock synchronization is performed after the
prescaler
A block diagram of the Type B timer is shown in
Timer3 and Timer5 are Type C timers with the following
specific features:
• A Type C timer can be concatenated with a Type
specific features:
• A Type C timer can be concatenated with a Type
B timer to form a 32-bit timer
• At least one Type C timer has the ability to trigger
an analog-to-digital conversion
• The external clock input (TxCK) is always
synchronized to the internal device clock and the
clock synchronization is performed before the
prescaler
clock synchronization is performed before the
prescaler
A block diagram of the Type C timer is shown in
FIGURE 13-1:
TYPE B TIMER BLOCK DIAGRAM (x = 2 or 4)
FIGURE 13-2:
TYPE C TIMER BLOCK DIAGRAM (x = 3 or 5)
Note 1: This data sheet summarizes the features
of the dsPIC33FJ32MC302/304,
dsPIC33FJ64MCX02/X04 and
dsPIC33FJ128MCX02/X04 family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 11. “Timers”
(DS70205) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip web site
(
dsPIC33FJ64MCX02/X04 and
dsPIC33FJ128MCX02/X04 family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 11. “Timers”
(DS70205) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip web site
(
www.microchip.com
).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
available on all devices. Refer to
in
this data sheet for device-specific register
and bit information.
and bit information.
Prescaler
(/n)
TGATE
TCS
00
10
x1
TMRx
Comparator
PRx
TGATE
Set TxIF flag
0
1
Sync
TCKPS<1:0>
Equal
Reset
TxCK
Gate
Sync
F
CY
Falling Edge
Detect
Prescaler
(/n)
TCKPS<1:0>
Prescaler
(/n)
Gate
Sync
Sync
TGATE
TCS
00
10
x1
TMRx
Comparator
PRx
F
CY
TGATE
Falling Edge
Detect
Set TxIF flag
0
1
Sync
TCKPS<1:0>
Equal
Reset
TxCK
ADC SOC Trigger
Prescaler
(/n)
TCKPS<1:0>