Microchip Technology MA330019 데이터 시트

다운로드
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dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
DS70291G-page  230
© 2007-2012 Microchip Technology Inc.
bit 5
TQGATE: Timer Gated Time Accumulation Enable bit
1 = Timer gated time accumulation enabled
0 = Timer gated time accumulation disabled
bit 4-3
TQCKPS<1:0>: Timer Input Clock Prescale Select bits
(3)
11 = 1:256 prescale value
10 = 1:64 prescale value
01 = 1:8 prescale value
00 = 1:1 prescale value
bit 2
POSRES: Position Counter Reset Enable bit
(4)
1 = Index Pulse resets Position Counter
0 = Index Pulse does not reset Position Counter
bit 1
TQCS: Timer Clock Source Select bit
1 = External clock from pin QEAx (on the rising edge)
0 = Internal clock (T
CY
)
bit 0
UPDN_SRC: Position Counter Direction Selection Control bit
(5)
1 = QEBx pin state defines position counter direction
0 = Control/Status bit, UPDN (QEIxCON<11>), defines timer counter (POSxCNT) direction
REGISTER 17-1:
QEIxCON: QEIx CONTROL REGISTER (x = 1 or 2)  (CONTINUED)
Note 1: This bit only applies when QEIM<2:0> = ‘110’ or ‘100’.
2: Read-only bit when QEIM<2:0> = ‘1XX’. Read/write bit when QEIM<2:0> = ‘001’.
3: Prescaler utilized for 16-bit Timer mode only.
4: This bit applies only when QEIM<2:0> = 100 or 110.
5: When configured for QEI mode, this control bit is a ‘don’t care’.