Microchip Technology DM163025-1 데이터 시트
PIC18(L)F2X/45K50
DS30684A-page 358
2012 Microchip Technology Inc.
24.2.4
USB ENDPOINT CONTROL
Each of the 16 possible bidirectional endpoints has its
own independent control register, UEPn (where ‘n’ rep-
resents the endpoint number). Each register has an
identical complement of control bits. The prototype is
shown in
own independent control register, UEPn (where ‘n’ rep-
resents the endpoint number). Each register has an
identical complement of control bits. The prototype is
shown in
.
The EPHSHK bit (UEPn<4>) controls handshaking for
the endpoint; setting this bit enables USB handshaking.
Typically, this bit is always set except when using
isochronous endpoints.
The EPCONDIS bit (UEPn<3>) is used to enable or
disable USB control operations (SETUP) through the
endpoint. Clearing this bit enables SETUP transac-
tions. Note that the corresponding EPINEN and
EPOUTEN bits must be set to enable IN and OUT
the endpoint; setting this bit enables USB handshaking.
Typically, this bit is always set except when using
isochronous endpoints.
The EPCONDIS bit (UEPn<3>) is used to enable or
disable USB control operations (SETUP) through the
endpoint. Clearing this bit enables SETUP transac-
tions. Note that the corresponding EPINEN and
EPOUTEN bits must be set to enable IN and OUT
transactions. For Endpoint 0, this bit should always be
cleared since the USB specifications identify
Endpoint 0 as the default control endpoint.
The EPOUTEN bit (UEPn<2>) is used to enable or dis-
able USB OUT transactions from the host. Setting this
bit enables OUT transactions. Similarly, the EPINEN bit
(UEPn<1>) enables or disables USB IN transactions
from the host.
The EPSTALL bit (UEPn<0>) is used to indicate a
STALL condition for the endpoint. If a STALL is issued
on a particular endpoint, the EPSTALL bit for that end-
point pair will be set by the SIE. This bit remains set
until it is cleared through firmware, or until the SIE is
reset.
cleared since the USB specifications identify
Endpoint 0 as the default control endpoint.
The EPOUTEN bit (UEPn<2>) is used to enable or dis-
able USB OUT transactions from the host. Setting this
bit enables OUT transactions. Similarly, the EPINEN bit
(UEPn<1>) enables or disables USB IN transactions
from the host.
The EPSTALL bit (UEPn<0>) is used to indicate a
STALL condition for the endpoint. If a STALL is issued
on a particular endpoint, the EPSTALL bit for that end-
point pair will be set by the SIE. This bit remains set
until it is cleared through firmware, or until the SIE is
reset.
REGISTER 24-4:
UEPn: USB ENDPOINT n CONTROL REGISTER (UEP0 THROUGH UEP15)
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
—
—
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
(1)
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-5
Unimplemented:
Read as ‘0’
bit 4
EPHSHK:
Endpoint Handshake Enable bit
1
= Endpoint handshake enabled
0
= Endpoint handshake disabled (typically used for isochronous endpoints)
bit 3
EPCONDIS:
Bidirectional Endpoint Control bit
If EPOUTEN = 1 and EPINEN = 1:
1
1
= Disable Endpoint n from control transfers; only IN and OUT transfers allowed
0
= Enable Endpoint n for control (SETUP) transfers; IN and OUT transfers also allowed
bit 2
EPOUTEN:
Endpoint Output Enable bit
1
= Endpoint n output enabled
0
= Endpoint n output disabled
bit 1
EPINEN:
Endpoint Input Enable bit
1
= Endpoint n input enabled
0
= Endpoint n input disabled
bit 0
EPSTALL:
Endpoint STALL Enable bit
(1)
1
= Endpoint n is stalled
0
= Endpoint n is not stalled
Note 1:
Valid only if Endpoint n is enabled; otherwise, the bit is ignored.