Microchip Technology DM163025-1 데이터 시트
PIC18(L)F2X/45K50
DS30684A-page 74
2012 Microchip Technology Inc.
FIGURE 5-7:
TIME-OUT SEQUENCE ON POR W/PLL ENABLED (MCLR TIED TO V
DD
)
T
PWRT
T
OST
V
DD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
PLL TIME-OUT
T
PLL
Note:
T
OST
= 1024 clock cycles.
T
PLL
2 ms max. First three stages of the PWRT timer.