Microchip Technology DM164134 데이터 시트
PIC18FXX8
DS41159E-page 282
© 2006 Microchip Technology Inc.
TABLE 25-1:
OPCODE FIELD DESCRIPTIONS
Field
Description
a
RAM access bit:
a = 0: RAM location in Access RAM (BSR register is ignored)
a = 1: RAM bank is specified by BSR register
a = 0: RAM location in Access RAM (BSR register is ignored)
a = 1: RAM bank is specified by BSR register
bbb
Bit address within an 8-bit file register (0 to 7).
BSR
Bank Select Register. Used to select the current RAM bank.
d
Destination select bit:
d = 0: store result in WREG
d = 1: store result in file register f
d = 0: store result in WREG
d = 1: store result in file register f
dest
Destination either the WREG register or the specified register file location.
f
8-bit register file address (0x00 to 0xFF).
fs
12-bit register file address (0x000 to 0xFFF). This is the source address.
fd
12-bit register file address (0x000 to 0xFFF). This is the destination address.
k
Literal field, constant data or label (may be either an 8-bit, 12-bit or a 20-bit value).
label
Label name.
mm
The mode of the TBLPTR register for the table read and table write instructions.
Only used with table read and table write instructions:
Only used with table read and table write instructions:
*
No change to register (such as TBLPTR with table reads and writes)
*+
Post-Increment register (such as TBLPTR with table reads and writes)
*-
Post-Decrement register (such as TBLPTR with table reads and writes)
+*
Pre-Increment register (such as TBLPTR with table reads and writes)
n
The relative address (2’s complement number) for relative branch instructions or the direct address for
Call/Branch and Return instructions.
Call/Branch and Return instructions.
PRODH
Product of Multiply High Byte.
PRODL
Product of Multiply Low Byte.
s
Fast Call/Return mode select bit:
s = 0: do not update into/from shadow registers
s = 1: certain registers loaded into/from shadow registers (Fast mode)
s = 0: do not update into/from shadow registers
s = 1: certain registers loaded into/from shadow registers (Fast mode)
u
Unused or unchanged.
WREG
Working register (accumulator).
x
Don’t care (0 or 1).
The assembler will generate code with x = 0. It is the recommended form of use for compatibility with all
Microchip software tools.
The assembler will generate code with x = 0. It is the recommended form of use for compatibility with all
Microchip software tools.
TBLPTR
21-bit Table Pointer (points to a program memory location).
TABLAT
8-bit Table Latch.
TOS
Top-of-Stack.
PC
Program Counter
PCL
Program Counter Low Byte.
PCH
Program Counter High Byte.
PCLATH
Program Counter High Byte Latch.
PCLATU
Program Counter Upper Byte Latch.
GIE
Global Interrupt Enable bit.
WDT
Watchdog Timer.
TO
Time-out bit.
PD
Power-Down bit.
C, DC, Z, OV, N
ALU status bits: Carry, Digit Carry, Zero, Overflow, Negative.
[ ]
Optional.
( )
Contents.
→
Assigned to.
< >
Register bit field.
∈
In the set of.
italics
User defined term (font is courier).