Microchip Technology DM183037 데이터 시트

다운로드
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 2012 Microchip Technology Inc.
DS30575A-page 187
PIC18F97J94 FAMILY
  
REGISTER 10-17: IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
OSCFIP
SSP2IP
BCL2IP
USBIP
BCL1IP
HLVDIP
TMR3IP
TMR3GIP
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
OSCFIP: Oscillator Fail Interrupt Priority bit
1  = High  priority
0 = Low priority
bit 6
SSP2IP: Master Synchronous Serial Port 2 Interrupt Priority bit
1  = High  priority
0 = Low priority
bit 5
BCL2IP: Bus Collision Interrupt Priority bit (MSSP)
1  = High  priority
0 = Low priority
bit 4
USBIP: USB Interrupt Priority bit
1  = High  priority
0 = Low priority
bit 3
BCL1IP: Bus Collision Interrupt Priority bit 
1  = High  priority
0 = Low priority
bit 2
HLVDIP: High/Low-Voltage Detect Interrupt Priority bit 
1  = High  priority
0 = Low priority
bit 1
TMR3IP: TMR3 Overflow Interrupt Priority bit 
1  = High  priority
0 = Low priority
bit 0
TMR3GIP: TMR3 Gate Interrupt Priority bit 
1  = High  priority
0 = Low priority