Texas Instruments EK-TM4C123GXL 데이터 시트
BoosterPack Functional Interface
2
BoosterPack Functional Interface
The Tiva C Series LaunchPad BoosterPack Interface provides compatibility with the original MSP430
LaunchPad BoosterPack interface. This interface consists of the outer 10-pin headers. The pins are
spaced 0.10 in (2,54 mm) apart with the two headers located 1.8 in (4,572 cm) apart.
LaunchPad BoosterPack interface. This interface consists of the outer 10-pin headers. The pins are
spaced 0.10 in (2,54 mm) apart with the two headers located 1.8 in (4,572 cm) apart.
and
both provide information about which Tiva C Series MCU peripherals are routed to
each of the interface pins. The J1 connector is located on the far left side of the Tiva C Series LaunchPad.
The J2 connector is located on the far right side of the TM4C123G LaunchPad. Software is used to
configure the TM4C123GH6PM pin for one of the functions found in the tables. Highlighted functions
indicate configuration for compatibility with the MSP430 LaunchPad.
The J2 connector is located on the far right side of the TM4C123G LaunchPad. Software is used to
configure the TM4C123GH6PM pin for one of the functions found in the tables. Highlighted functions
indicate configuration for compatibility with the MSP430 LaunchPad.
Table 2. J1 Connector
(1)
Analog
Tiva C
GPIOPCTL Register Setting
On-
Function
Series
J1 Pin
GPIO
board
MCU
GPIO
Function
1
2
3
4
5
6
7
8
9
14
15
Pin
AMSEL
1.01
3.3 V
1.02
PB5
AIN11
–
57
–
SSI2Fss
–
M0PWM3
–
–
T1CCP1
CAN0Tx
–
–
–
1.03
PB0
USB0ID
–
45
U1Rx
–
–
–
–
–
T2CCP0
–
–
–
–
1.04
PB1
USB0VBUS
–
46
U1Tx
–
–
–
–
–
T2CCP1
–
–
–
–
1.05
PE4
AIN9
–
59
U5Rx
–
I2C2SCL
M0PWM4
M1PWM2
–
–
CAN0Rx
–
–
–
1.06
PE5
AIN8
–
60
U5Tx
–
I2C2SDA
M0PWM5
M1PWM3
–
–
CAN0Tx
–
–
–
1.07
PB4
AIN10
–
58
–
SSI2Clk
–
M0PWM2
–
–
T1CCP0
CAN0Rx
–
–
–
1.08
PA5
–
–
22
–
SSI0Tx
–
–
–
–
–
–
–
–
–
1.09
PA6
–
–
23
–
–
I2C1SCL
–
M1PWM2
–
–
–
–
–
–
1.10
PA7
–
–
24
–
–
I2C1SDA
–
M1PWM3
–
–
–
–
–
–
(1)
Shaded cells indicate configuration for compatibility with the MSP430 LaunchPad.
Table 3. J2 Connector
(1)
Analog
Tiva C
GPIOPCTL Register Setting
Function
J2
On-board
Series
GPIO
Pin
Function
MCU
GPIO
1
2
3
4
5
6
7
8
9
14
15
Pin
AMSEL
2.01
GND
2.02
PB2
–
–
47
–
–
I2C0SCL
–
–
–
T3CCP0
–
–
–
–
2.03
PE0
AIN3
–
9
U7Rx
–
–
–
–
–
–
–
–
–
–
2.04
(2)
PF0
–
USR_SW2/
28
U1RTS
SSI1Rx
CAN0Rx
–
M1PWM4
PhA0
T0CCP0
NMI
C0o
–
–
WAKE (R1)
2.05
RESET
PB7
–
Connected
4
–
SSI2Tx
–
M0PWM1
–
–
T0CCP1
–
–
–
–
for MSP430
2.06
PD1
AIN6
62
SSI3Fss
SSI1Fss
I2C3SDA
M0PWM7
M1PWM1
–
WT2CCP1
–
–
–
–
Compatibility
(R10)
PB6
–
Connected
1
–
SSI2Rx
–
M0PWM0
–
–
T0CCP0
–
–
–
–
for MSP430
2.07
PD0
AIN7
61
SSI3Clk
SSI1Clk
I2C3SCL
M0PWM6
M1PWM0
–
WT2CCP0
–
–
–
–
Compatibility
(R9)
2.08
PA4
–
–
21
–
SSI0Rx
–
–
–
–
–
–
–
–
–
2.09
PA3
–
–
20
–
SSI0Fss
–
–
–
–
–
–
–
–
–
2.10
PA2
–
–
19
–
SSI0Clk
–
–
–
–
–
–
–
–
–
(1)
Shaded cells indicate configuration for compatibility with the MSP430 LaunchPad.
(2)
Not recommended for BoosterPack use. J2.04 is a TEST pin on the MSP430 LaunchPad. This signal tied to on-board function
via 0-
via 0-
Ω
resistor.
4
Tiva™ C Series EK-TM4C123GXL LaunchPad: BoosterPack Development
SPMU288A – August 2012 – Revised April 2013
Guide
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