Freescale Semiconductor FRDM-FXS-MULTI 데이터 시트
MPL3115A2
Sensors
32
Freescale Semiconductor, Inc.
7.17.3 CTRL_REG3 (Interrupt CTRL Register) (0x28)
7.17.4 CTRL_REG4 [Interrupt Enable Register] (0x29)
The corresponding functional block interrupt enable bit allows the functional block to route its event detection flags to the sys-
tem’s interrupt controller. The interrupt controller routes the enabled functional block interrupt to the INT1 or INT2 pin.
Table 62. CTRL_REG3 Register
7
6
5
4
3
2
1
0
R
0
IPOL1
PP_OD1
0
IPOL2
PP_OD2
W
Reset
0
0
0
0
0
0
0
0
Table 63. CTRL_REG3 Description
Name
Description
IPOL1
The IPOL bit selects the polarity of the interrupt signal. When IPOL is ‘0’ (default value) any interrupt event will signalled
with a logical ‘0'. Interrupt Polarity active high, or active low on interrupt pad INT1.
Default value: 0
0: Active low
1: Active high
with a logical ‘0'. Interrupt Polarity active high, or active low on interrupt pad INT1.
Default value: 0
0: Active low
1: Active high
PP_OD1
This bit configures the interrupt pin to Push-Pull or in Open Drain mode. The default value is 0 which corresponds to
Push-Pull mode. The open drain configuration can be used for connecting multiple interrupt signals on the same interrupt
line. Push-Pull/Open Drain selection on interrupt pad INT1.
Default value: 0
0: Internal Pullup
1: Open drain
Push-Pull mode. The open drain configuration can be used for connecting multiple interrupt signals on the same interrupt
line. Push-Pull/Open Drain selection on interrupt pad INT1.
Default value: 0
0: Internal Pullup
1: Open drain
IPOL2
Interrupt Polarity active high, or active low on interrupt pad INT2.
Default value: 0
0: Active low
1: Active high
Default value: 0
0: Active low
1: Active high
PP_OD2
Push-Pull/Open Drain selection on interrupt pad INT2.
Default value: 0
0: Internal Pull-up
1: Open drain
Default value: 0
0: Internal Pull-up
1: Open drain
Table 64. CTRL_REG4 Register
7 6
5
4
3
2
1
0
R
INT_EN_DRDY
INT_EN _FIFO
INT_EN_PW INT_EN_TW INT_EN_PTH INT_EN_TTH INT_EN_PCHG INT_EN_TCHG
W
Reset
0
0
0
0
0
0
0
0
Table 65. Interrupt Enable Register Description
Interrupt Enable
Description
INT_EN_DRDY
Interrupt Enable.
Default value: 0
0: Data Ready interrupt disabled
1: Data Ready interrupt enabled
Default value: 0
0: Data Ready interrupt disabled
1: Data Ready interrupt enabled
INT_EN_FIFO
Interrupt Enable.
Default value: 0
0: FIFO interrupt disabled
1: FIFO interrupt enabled
Default value: 0
0: FIFO interrupt disabled
1: FIFO interrupt enabled
INT_EN_PW
Interrupt Enable.
Default value: 0
0: Pressure window interrupt disabled
1: Pressure window interrupt enabled
Default value: 0
0: Pressure window interrupt disabled
1: Pressure window interrupt enabled