Freescale Semiconductor FRDM-FXS-MULTI 데이터 시트

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MMA8652FC
Sensors
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Freescale Semiconductor, Inc.
6.3
Data registers 
The following are the data registers for the MMA8652FC device. For more information about data manipulation in the 
MMA8652FC, see application note AN4083, Data Manipulation and Basic Settings for Xtrinsic MMA865xFC Accelerometers. 
When the F_MODE bits (F_SETUP register 0x09, bit 6 and 7) are cleared, the FIFO is not ON. Register 0x00 reflects the 
real-time status information of the X, Y and Z sample data.
When the F_MODE value is greater than zero, then the FIFO is ON (in either Fill, Circular, or Trigger mode). In this case, 
register 0x00 will reflect the status of the FIFO. It is expected that when the FIFO is ON, the user will access the data from 
register 0x01 (X_MSB) for either the 12-bit or 8-bit data. 
When accessing the 8-bit data, the F_READ bit (register 0x2A) is set, which modifies the auto-incrementing to skip over the 
LSB data.
When the F_READ bit is cleared, the 12-bit data is read, accessing all 6 bytes sequentially (X_MSB, X_LSB, Y_MSB, 
Y_LSB, Z_MSB, Z_LSB).
6.3.1
0x00: STATUS Data Status register (F_MODE = 00)
When F_MODE = 0, register 0x00 reflects the real-time status information of the X, Y and Z sample data; it contains the X, Y, and 
Z data overwrite and data ready flag.
These registers contain the X-axis, Y-axis, and Z-axis 12-bit output sample data (expressed as 2's complement numbers). 
OUT_X_MSB, OUT_X_LSB, OUT_Y_MSB, OUT_Y_LSB, OUT_Z_MSB, and OUT_Z_LSB are stored in the auto-
incrementing address range of 0x01 – 0x06, to reduce reading the status followed by 12-bit axis data to 7 bytes.  If the 
F_READ bit is set (0x2A bit 1), then auto-increment will skip over LSB registers (to access the MSB data only). This will 
shorten the data acquisition from seven bytes to four bytes. 
Table 14. F_MODE = 00: 0x00 STATUS: Data Status register (Read-Only)
Back to Register Address Map
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ZYXOW
ZOW
YOW
XOW
ZYXDR
ZDR
YDR
XDR
Table 15. STATUS register bits
Bit(s)
Field
Description
Notes
7
ZYXOW
X, Y, Z-axis data overwrite 
• Set whenever a new acceleration data is produced before completing the retrieval of the previous set
This event occurs when the content of at least one acceleration data register (i.e., OUT_X, OUT_Y, OUT_Z) has been 
overwritten. 
• Cleared when the high bytes of the acceleration data (OUT_X_MSB, OUT_Y_MSB, OUT_Z_MSB) of all the channels are 
read.
0 No data overwrite has occurred (default)
1 Previous X, Y, or Z data was overwritten by new X, Y, or Z data before it (the previous X, Y, or Z data) was read
6
ZOW
Z-axis data overwrite 
For # = Z, Y, or X:
• Set whenever a new acceleration sample related to 
the #-axis is generated before the retrieval of the 
previous sample
. When this occurs, the previous 
sample is overwritten. 
• Cleared whenever the OUT_#_MSB register is read.
0 No data overwrite has occurred (default)
1 Previous Z-axis data was overwritten by new #-axis 
data before it (the previous #-axis data) was read
5
YOW
Y-axis data overwrite 
4
XOW
X-axis data overwrite 
3
ZYXDR
X, Y, Z-axis new data ready 
• Set when a new sample for any of the enabled channels is available. 
• Cleared when the high-bytes of the acceleration data (OUT_X_MSB, OUT_Y_MSB, OUT_Z_MSB) of all the channels 
are read.
0 No new set of data ready (default)
1 A new set of data is ready
2
ZDR
Z-axis new data available For 
# = Z, Y, or X
• Set whenever a new acceleration sample related to 
the #-axis is generated. 
• Cleared whenever the OUT_#_MSB register is read.
0 No  new  #-axis data ready (default)
1 New #-axis data is ready
1
YDR
Y-axis new data available
0
XDR
X-axis new data available