Freescale Semiconductor FRDM-FXS-MULTI 데이터 시트
FXOS8700CQ
Sensors
Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc.
67
10.11.3
TRANSIENT_THS (0x1F) register
The TRANSIENT_THS register determines the debounce counter behavior and also sets the transient event detection
threshold.It is possible to use A_FFMT_THS_X/Y/Z MSB and LSB registers to set transient acceleration thresholds for individual
axes using the a_ffmt_trans_ths_en bit in A_FFMT_THS_Y_MSB register.
threshold.It is possible to use A_FFMT_THS_X/Y/Z MSB and LSB registers to set transient acceleration thresholds for individual
axes using the a_ffmt_trans_ths_en bit in A_FFMT_THS_Y_MSB register.
The tr_ths[6:0] value is a 7-bit unsigned number, with a fixed resolution of 63 mg/LSB corresponding to a ±8 g measurement
range. The resolution does not change with the full-scale range setting made in XYZ_DATA_CFG[fs]. If CTRL_REG1[lnoise] = 1,
the measurement range is fixed at ±4 g, regardless of the settings made in XYZ_DATA_CFG.
range. The resolution does not change with the full-scale range setting made in XYZ_DATA_CFG[fs]. If CTRL_REG1[lnoise] = 1,
the measurement range is fixed at ±4 g, regardless of the settings made in XYZ_DATA_CFG.
10.11.4
TRANSIENT_COUNT (0x20) register
The TRANSIENT_COUNT register sets the minimum number of debounce counts needed to trigger the transient event interrupt
flag when the measured acceleration value exceeds the threshold set in TRANSIENT_THS for any of the enabled axes.
flag when the measured acceleration value exceeds the threshold set in TRANSIENT_THS for any of the enabled axes.
The time step for the transient detection debounce counter is set by the value of the system ODR and power mode as shown in
. When the device is operated in hybrid mode, the effective ODR is half of what is selected in CTRL_REG1, which also
doubles the time-step values shown in
.
An ODR of 100 Hz and a TRANSIENT_COUNT value of 15, when accelerometer OSR is set to normal using CTRL_REG2,
would result in minimum debounce response time of 150 ms. When the device is operated in hybrid mode, these settings would
result in an effective debounce time of 300 ms.
would result in minimum debounce response time of 150 ms. When the device is operated in hybrid mode, these settings would
result in an effective debounce time of 300 ms.
Table 116. TRANSIENT_THS register
tr_dbcntm
tr_ths[6:0]
0
0b000_0000
Table 117. TRANSIENT_THS bit descriptions
Field
Description
tr_dbcntm
Debounce counter mode selection.
0: Decrements debounce counter when the transient event condition is not true during the current ODR period.
1: Clears debounce counter when the transient event condition is not true during the current ODR period.
0: Decrements debounce counter when the transient event condition is not true during the current ODR period.
1: Clears debounce counter when the transient event condition is not true during the current ODR period.
tr_ths[6:0]
Transient event threshold. This register has a resolution of 63 mg/LSB regardless of the full-scale range setting made in
XYZ_DATA_CFG[fs]. If CTRL_REG1[lnoise] = 1, the maximum acceleration measurement range is ±4 g.
XYZ_DATA_CFG[fs]. If CTRL_REG1[lnoise] = 1, the maximum acceleration measurement range is ±4 g.
Table 118. TRANSIENT_COUNT register
tr_count[7:0]
0b0000_0000
Table 119. TRANSIENT_COUNT bit description
Field
Description
tr_count[7:0)
Transient function debounce count value.
Table 120. TRANSIENT_COUNT relationship with the ODR
ODR (Hz)
Max time range (s)
Time step (ms)
Normal
LPLN
High
resolution
Low power
Normal
LPLN
High
resolution
Low power
800
0.319
0.319
0.319
0.319
1.25
1.25
1.25
1.25
400
0.638
0.638
0.638
0.638
2.5
2.5
2.5
2.5
200
1.28
1.28
0.638
1.28
5
5
2.5
5
100
2.55
2.55
0.638
2.55
10
10
2.5
10
50
5.1
5.1
0.638
5.1
20
20
2.5
20
12.5
5.1
20.4
0.638
20.4
20
80
2.5
80
6.25
5.1
20.4
0.638
40.8
20
80
2.5
160
1.56
5.1
20.4
0.638
40.8
20
80
2.5
160