Freescale Semiconductor FRDM-FXS-MULTI 데이터 시트
FXOS8700CQ
Sensors
Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc.
87
10.18.2 M_VECM_THS_MSB (0x6A) register
10.18.3 M_VECM_THS_LSB (0x6B) register
10.18.4 M_VECM_CNT (0x6C) register
The debounce timer period is determined by the ODR selected in CTRL_REG1; it is equal to the number indicated in
M_VECM_CNT register times 1/ODR. For example, a value of 16 in M_VECM_CNT with an ODR setting of 400 Hz will result in
a debounce period of 40 ms. Note that ODR is halved when in hybrid mode.
M_VECM_CNT register times 1/ODR. For example, a value of 16 in M_VECM_CNT with an ODR setting of 400 Hz will result in
a debounce period of 40 ms. Note that ODR is halved when in hybrid mode.
Table 206. M_VECM_THS_MSB register
m_vecm_dbcntm
m_vecm_ths[14:8]
0
0b000_0000
Table 207. M_VECM_THS_MSB bit descriptions
Field
Description
m_vecm_dbcntm
Magnetic vector-magnitude debounce counter mode selection:
0: The debounce counter is decremented by 1 whenever the current vector-magnitude result is below the threshold
set in M_VECM_THS.
1: The debounce counter is cleared whenever the current vector-magnitude result is below the threshold set in
M_VECM_THS.
0: The debounce counter is decremented by 1 whenever the current vector-magnitude result is below the threshold
set in M_VECM_THS.
1: The debounce counter is cleared whenever the current vector-magnitude result is below the threshold set in
M_VECM_THS.
m_vecm_ths[14:8]
Seven most significant bits of 15-bit unsigned magnetic vector-magnitude threshold. Resolution is 0.1
μT/LSB.
Table 208. M_VECM_THS_LSB register
m_vecm_ths[7:0]
0b0000_0000
Table 209. M_VECM_CNT register
m_vecm_cnt[7:0]
0b0000_0000
Table 210. M_VECM_CNT bit description
Field
Description
m_vecm_cnt[7:0]
Vector-magnitude debounce count value.