Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 사용자 설명서
제품 코드
DEMO9S12XHY256
Device Overview MC9S12XHY-Family
MC9S12XHY-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
27
NOTE
MC9S12XHY-Family memory map is difference with MCU9S12HY64
Family device
Family device
1.6
Part ID Assignments
The part ID is located in two 8-bit registers PARTIDH and PARTIDL (addresses 0x001A and 0x001B).
The read-only value is a unique part ID for each revision of the chip.
The read-only value is a unique part ID for each revision of the chip.
shows the assigned part ID
number and Mask Set number.
The Version ID in Table 1-4. is a word located in a flash information row at address 0x40_00E8. The
version ID number indicates a specific version of internal NVM controller.
version ID number indicates a specific version of internal NVM controller.
1.7
Signal Description
This section describes signals that connect off-chip. It includes a pinout diagram, a table of signal
properties, and detailed discussion of signals. It is built from the signal description sections of the
individual IP blocks on the device.
properties, and detailed discussion of signals. It is built from the signal description sections of the
individual IP blocks on the device.
1.7.1
Device Pinout
Table 1-4. Assigned Part ID Numbers
Device
Mask Set Number
Part ID
(1)
1. The coding is as follows:
Bit 15-12: Major family identifier
Bit 11-6: Minor family identifier
Bit 5-4: Major mask set revision number including FAB transfers
Bit 3-0: Minor — non full — mask set revision
Bit 11-6: Minor family identifier
Bit 5-4: Major mask set revision number including FAB transfers
Bit 3-0: Minor — non full — mask set revision
Version ID
MC9S12XHY256
0M23Y
$E010
$FFFF
MC9S12XHY128
0M23Y
$E010
$FFFF