Atmel Evaluation Kit AT91SAM9260-EK AT91SAM9260-EK 데이터 시트

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AT91SAM9260-EK
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SAM9260 [SUMMARY]
6221LS–ATARM–15-Oct-12
 
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Asynchronous read in Page Mode supported (4- up to 32-byte page size)
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Multiple device adaptability
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Compliant with LCD Module
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Control signals programmable setup, pulse and hold time for each Memory Bank
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Multiple Wait State Management
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Programmable Wait State Generation
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External Wait Request
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Programmable Data Float Time
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Slow Clock mode supported
8.2.3
SDRAM Controller
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Supported devices
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Standard and Low-power SDRAM (Mobile SDRAM)
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Numerous configurations supported
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2K, 4K, 8K Row Address Memory Parts 
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SDRAM with two or four Internal Banks
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SDRAM with 16- or 32-bit Datapath
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Programming facilities
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Word, half-word, byte access
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Automatic page break when Memory Boundary has been reached
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Multibank Ping-pong Access
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Timing parameters specified by software
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Automatic refresh operation, refresh rate is programmable
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Energy-saving capabilities
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Self-refresh, power down and deep power down modes supported
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Error detection
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Refresh Error Interrupt
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SDRAM Power-up Initialization by software
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CAS Latency of 1, 2 and 3 supported
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Auto Precharge Command not used
8.2.4
Error Corrected Code Controller
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Tracking the accesses to a NAND Flash device by triggering on the corresponding chip select
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Single bit error correction and 2-bit Random detection
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Automatic Hamming Code Calculation while writing
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ECC value available in a register
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Automatic Hamming Code Calculation while reading
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Error Report, including error flag, correctable error flag and word address being detected erroneous 
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Support 8- or 16-bit NAND Flash devices with 512-, 1024-, 2048- or 4096-bytes pages