Atmel Evaluation Kit AT91SAM9260-EK AT91SAM9260-EK 데이터 시트

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AT91SAM9260-EK
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SAM9260 [SUMMARY]
6221LS–ATARM–15-Oct-12
 
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8-level Priority Controller
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Drives the Normal Interrupt of the processor
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Handles priority of the interrupt sources 1 to 31
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Higher priority interrupts can be served during service of lower priority interrupt
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Vectoring
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Optimizes Interrupt Service Routine Branch and Execution
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One 32-bit Vector Register per interrupt source
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Interrupt Vector Register reads the corresponding current Interrupt Vector
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Protect Mode
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Easy debugging by preventing automatic operations when protect models are enabled
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Fast Forcing
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Permits redirecting any normal interrupt source on the Fast Interrupt of the processor
9.11 Debug Unit
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Composed of two functions:
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Two-pin UART
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Debug Communication Channel (DCC) support
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Two-pin UART
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Implemented features are 100% compatible with the standard Atmel 
®
 USART
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Independent receiver and transmitter with a common programmable Baud Rate Generator
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Even, Odd, Mark or Space Parity Generation
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Parity, Framing and Overrun Error Detection
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Automatic Echo, Local Loopback and Remote Loopback Channel Modes
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Support for two PDC channels with connection to receiver and transmitter
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Debug Communication Channel Support
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Offers visibility of and interrupt trigger from COMMRX and COMMTX signals from the ARM Processor’s ICE 
Interface
9.12 Chip Identification
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Chip ID: 0x019803A2
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JTAG ID: 0x05B1303F
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ARM926 TAP ID: 0x0792603F