Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK 데이터 시트
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제품 코드
AT91SAM9G25-EK
163
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
18.7.2 Shutdown Mode Register
Name:
SHDW_MR
Address:
0xFFFFFE14
Access:
Read/Write
• WKMODE0: Wake-up Mode 0
• CPTWK0: Counter on Wake-up 0
Defines the number of 16 Slow Clock cycles, the level detection on the corresponding input pin shall last before the wake-up
event occurs. Because of the internal synchronization of WKUP0, the SHDN pin is released
(CPTWK x 16 + 1) Slow Clock cycles after the event on WKUP.
event occurs. Because of the internal synchronization of WKUP0, the SHDN pin is released
(CPTWK x 16 + 1) Slow Clock cycles after the event on WKUP.
• RTCWKEN: Real-time Clock Wake-up Enable
0 = The RTC Alarm signal has no effect on the Shutdown Controller.
1 = The RTC Alarm signal forces the de-assertion of the SHDN pin.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
RTCWKEN
–
15
14
13
12
11
10
9
8
–
–
–
–
7
6
5
4
3
2
1
0
CPTWK0
–
–
WKMODE0
WKMODE[1:0]
Wake-up Input Transition Selection
0
0
None. No detection is performed on the wake-up input
0
1
Low to high level
1
0
High to low level
1
1
Both levels change