Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK 데이터 시트
제품 코드
AT91SAM9G25-EK
777
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
39.6.3 Interrupt
The USART interrupt line is connected on one of the internal sources of the Interrupt Controller. using the USART
interrupt requires the Interrupt Controller to be programmed first. Note that it is not recommended to use the USART
interrupt line in edge sensitive mode.
interrupt requires the Interrupt Controller to be programmed first. Note that it is not recommended to use the USART
interrupt line in edge sensitive mode.
39.7
Functional Description
The USART is capable of managing several types of serial synchronous or asynchronous communications.
It supports the following communication modes:
z
5-bit to 9-bit full-duplex asynchronous serial communication
z
MSB- or LSB-first
z
1, 1.5 or 2 stop bits
z
Parity even, odd, marked, space or none
z
By-8 or by-16 over-sampling receiver frequency
z
Optional hardware handshaking
z
Optional break management
z
Optional multidrop serial communication
z
High-speed 5- to 9-bit full-duplex synchronous serial communication
z
MSB-first or LSB-first
z
1 or 2 stop bits
z
Parity even, odd, marked, space or none
z
By-8 or by-16 over-sampling frequency
z
Optional hardware handshaking
z
Optional break management
z
Optional multidrop serial communication
z
RS485 with driver control signal
z
ISO7816, T0 or T1 protocols for interfacing with smart cards
z
NACK handling, error counter with repetition and iteration limit
z
InfraRed IrDA Modulation and Demodulation
z
SPI Mode
z
Master or Slave
z
Serial Clock Programmable Phase and Polarity
z
SPI Serial Clock (SCK) Frequency up to Internal Clock Frequency MCK/6
z
LIN Mode
z
Compliant with LIN 1.3 and LIN 2.0 specifications
z
Master or Slave
z
Processing of frames with up to 256 data bytes
z
Response Data length can be configurable or defined automatically by the Identifier
z
Self synchronization in Slave node configuration
Table 39-4. Peripheral IDs
Instance
ID
USART0
5
USART1
6
USART2
7
USART3
8