Atmel Evaluation Kit AT91SAM9X25-EK AT91SAM9X25-EK 데이터 시트

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SAM9X25 [DATASHEET]

11054E–ATARM–10-Mar-2014

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8-bit, 16-bit, or 32-bit Data Bus

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Multiple Access Modes supported

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Byte Write or Byte Select Lines

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Asynchronous read in Page Mode supported (4- up to 16-byte page size)

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Multiple device adaptability

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Control signals programmable setup, pulse and hold time for each Memory Bank

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Multiple Wait State Management

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Programmable Wait State Generation

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External Wait Request

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Programmable Data Float Time

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Slow Clock mode supported

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Supports 4-bank and 8-bank DDR2, LPDDR, SDR and LPSDR

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Numerous Configurations Supported

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2K, 4K, 8K, 16K Row Address Memory Parts

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SDRAM with 8 Internal Banks

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SDR-SDRAM with 32-bit Data Path

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DDR2/LPDDR with 16-bit Data Path

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One Chip Select for SDRAM Device (256 Mbyte Address Space)

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Programming Facilities

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Multibank Ping-pong Access (Up to 8 Banks Opened at Same Time = Reduces Average Latency of 
Transactions)

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Timing Parameters Specified by Software

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Automatic Refresh Operation, Refresh Rate is Programmable

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Automatic Update of DS, TCR and PASR Parameters (LPSDR)

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Energy-saving Capabilities

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Self-refresh, Power-down and Deep Power Modes Supported

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SDRAM Power-up Initialization by Software

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CAS Latency of 2, 3 Supported

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Auto Precharge Command Not Used

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SDR-SDRAM with 16-bit Datapath and Eight Columns Not Supported

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Clock Frequency Change in Precharge Power-down Mode Not Supported