Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK 데이터 시트

1003

SAM9G25 [DATASHEET]

11032D–ATARM–10-Mar-2014

Name: ISI_CFG1

0xF8048000

Read-write

Reset:  

0x00000000

0: HSYNC active high.

1: HSYNC active low.

0: VSYNC active high.

1: VSYNC active low.

0: Data is sampled on rising edge of pixel clock.

1: Data is sampled on falling edge of pixel clock.

0: Synchronization by HSYNC, VSYNC.

1: Synchronization by embedded synchronization sequence SAV/EAV.

0: No CRC correction is performed on embedded synchronization.

1: CRC correction is performed. if the correction is not possible, the current frame is discarded and the CRC_ERR is set in the 
status register.

0: All the frames are captured, else one frame every FRATE+1 is captured.

0: Codec datapath DMA interface requires a request to restart.

1: Codec datapath DMA automatically restarts.

31

30

29

28

27

26

25

24

SFD

23

22

21

20

19

18

17

16

SLD

15

14

13

12

11

10

9

8

–

THMASK

FULL

DISCR FRATE

7

6

5

4

3

2

1

0

CRC_SYNC

EMB_SYNC

–

PIXCLK_POL

VSYNC_POL

HSYNC_POL

–

–