Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD 데이터 시트
제품 코드
ATSAM4S-XPLD
697
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
shows the resulting Fi/Di Ratio, which is the ratio between the ISO7816 clock and the baud rate clock.
If the USART is configured in ISO7816 Mode, the clock selected by the USCLKS field in the Mode Register (US_MR) is
first divided by the value programmed in the field CD in the Baud Rate Generator Register (US_BRGR). The resulting
clock can be provided to the SCK pin to feed the smart card clock inputs. This means that the CLKO bit can be set in
US_MR.
first divided by the value programmed in the field CD in the Baud Rate Generator Register (US_BRGR). The resulting
clock can be provided to the SCK pin to feed the smart card clock inputs. This means that the CLKO bit can be set in
US_MR.
This clock is then divided by the value programmed in the FI_DI_RATIO field in the FI_DI_Ratio register (US_FIDI). This
is performed by the Sampling Divider, which performs a division by up to 2047 in ISO7816 Mode. The non-integer values
of the Fi/Di Ratio are not supported and the user must program the FI_DI_RATIO field to a value as close as possible to
the expected value.
is performed by the Sampling Divider, which performs a division by up to 2047 in ISO7816 Mode. The non-integer values
of the Fi/Di Ratio are not supported and the user must program the FI_DI_RATIO field to a value as close as possible to
the expected value.
The FI_DI_RATIO field resets to the value 0x174 (372 in decimal) and is the most common divider between the ISO7816
clock and the bit rate (Fi = 372, Di = 1).
clock and the bit rate (Fi = 372, Di = 1).
Figure 35-5. Elementary Time Unit (ETU)
Table 35-7. Binary and Decimal Values for Fi
FI field
0000
0001
0010
0011
0100
0101
0110
1001
1010
1011
1100
1101
Fi (decimal)
372
372
558
744
1116
1488
1860
512
768
1024
1536
2048
Table 35-8. Possible Values for the Fi/Di Ratio
Fi/Di
372
558
774
1116
1488
1806
512
768
1024
1536
2048
1
372
558
744
1116
1488
1860
512
768
1024
1536
2048
2
186
279
372
558
744
930
256
384
512
768
1024
4
93
139.5
186
279
372
465
128
192
256
384
512
8
46.5
69.75
93
139.5
186
232.5
64
96
128
192
256
16
23.25
34.87
46.5
69.75
93
116.2
32
48
64
96
128
32
11.62
17.43
23.25
34.87
46.5
58.13
16
24
32
48
64
12
31
46.5
62
93
124
155
42.66
64
85.33
128
170.6
20
18.6
27.9
37.2
55.8
74.4
93
25.6
38.4
51.2
76.8
102.4
1 ETU
ISO7816 Clock
on SCK
ISO7816 I/O Line
on TXD
FI_DI_RATIO
ISO7816 Clock Cycles