Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD 데이터 시트
제품 코드
ATSAM4S-XPLD
131
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
12.6.6.1 MUL, MLA, and MLS
Multiply, Multiply with Accumulate, and Multiply with Subtract, using 32-bit operands, and producing a 32-bit result.
Syntax
MUL{S}{cond} {Rd,} Rn, Rm ; Multiply
MLA{cond} Rd, Rn, Rm, Ra ; Multiply with accumulate
MLS{cond} Rd, Rn, Rm, Ra ; Multiply with subtract
where:
cond
S
is an optional suffix. If S is specified, the condition code flags are updated on the result of the operation,
see
.
Rd
is the destination register. If Rd is omitted, the destination register is Rn.
Rn, Rm
are registers holding the values to be multiplied.
Ra
is a register holding the value to be added or subtracted from.
Operation
The MUL instruction multiplies the values from Rn and Rm, and places the least significant 32 bits of the result in Rd.
The MLA instruction multiplies the values from Rn and Rm, adds the value from Ra, and places the least significant 32
bits of the result in Rd.
bits of the result in Rd.
The MLS instruction multiplies the values from Rn and Rm, subtracts the product from the value from Ra, and places the
least significant 32 bits of the result in Rd.
least significant 32 bits of the result in Rd.
The results of these instructions do not depend on whether the operands are signed or unsigned.
Restrictions
In these instructions, do not use SP and do not use PC.
If the S suffix is used with the MUL instruction:
Rd, Rn, and Rm must all be in the range R0 to R7
Rd must be the same as Rm
The cond suffix must not be used.
Condition Flags
If S is specified, the MUL instruction:
Updates the N and Z flags according to the result
Does not affect the C and V flags.
Examples
MUL R10, R2, R5 ; Multiply, R10 = R2 x R5
MLA R10, R2, R1, R5 ; Multiply with accumulate, R10 = (R2 x R1) + R5
MULS R0, R2, R2 ; Multiply with flag update, R0 = R2 x R2
MULLT R2, R3, R2 ; Conditionally multiply, R2 = R3 x R2
MLS R4, R5, R6, R7 ; Multiply with subtract, R4 = R7 - (R5 x R6)