Atmel ATSTK500 500 Starter kit and development system. ATSTK500 ATSTK500 데이터 시트
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ATSTK500
Hardware Description
AVR STK500 User Guide
3-25
1925C–AVR–3/03
3.9.1
Signal Descriptions
The signals AUXI1, AUXI0, AUXO1, and AUXO0 are intended for future use. Do not
connect these signals to your application.
connect these signals to your application.
The DATA[7:0] and CT[7:1] signals are also found on the Prog Data and Prog Ctrl con-
nectors. These signals and connectors are explained in Section 3.10 on page 3-25.
nectors. These signals and connectors are explained in Section 3.10 on page 3-25.
The BSEL2 signal is the same as that found on the BSEL2 jumper. This jumper is
explained in Section 3.8.5 on page 3-22.
explained in Section 3.8.5 on page 3-22.
The SI, SO, SCK, and CS signals are connected to the DataFlash. Use of the DataFlash
is described in Section 3.6 on page 3-6.
is described in Section 3.6 on page 3-6.
NC means that this pin is not connected.
The remaining signals are equal to those found on the PORT connectors, explained in
Section 3.4 on page 3-3.
Section 3.4 on page 3-3.
Note:
DATA, CT, and AUX signals are based on 5V CMOS logic. No voltage conver-
sion to adapt to VTG is done on these signals.
sion to adapt to VTG is done on these signals.
3.10
Prog Ctrl and
Prog Data
Headers
Prog Data
Headers
The Prog Ctrl and Prog Data headers are used for High-voltage Programming of the tar-
get AVR device. The placement of the headers is shown in Figure 3-33. During parallel
High-voltage Programming, the Prog Ctrl signals are routed to PORTD of the target
device. The Prog Data signals are routed to PORTB. See Section 3.7.2 on page 3-11 for
a complete description of High-voltage Programming. The pinouts of the Prog Ctrl and
Prog Data headers are shown in Figure 3-36 and Figure 3-37. For more information
about High-voltage Programming of AVR devices, see the programming section of each
AVR datasheet.
get AVR device. The placement of the headers is shown in Figure 3-33. During parallel
High-voltage Programming, the Prog Ctrl signals are routed to PORTD of the target
device. The Prog Data signals are routed to PORTB. See Section 3.7.2 on page 3-11 for
a complete description of High-voltage Programming. The pinouts of the Prog Ctrl and
Prog Data headers are shown in Figure 3-36 and Figure 3-37. For more information
about High-voltage Programming of AVR devices, see the programming section of each
AVR datasheet.
Note:
Prog Ctrl and Data connectors are connected directly to the master microcon-
troller without level converters. This means that these signals are always 5V
logic.
troller without level converters. This means that these signals are always 5V
logic.
Figure 3-36. Prog Ctrl Header Pinout
The Prog Ctrl signals are normally used for the control signals when parallel High-
voltage Programming an AVR device.
voltage Programming an AVR device.
Note:
All Prog Ctrl signals are based on 5V CMOS logic. No voltage conversion to
adapt to VTG is done on these signals.
adapt to VTG is done on these signals.
CT1(RDY/BSY)
CT3(/WR)
CT5(XA0)
CT7(PAGEL)
NC
1 2
NC
(OE)CT2
(BS1)CT4
(XA1)CT6
GND