Mikroelektronika MIKROE-742 데이터 시트

- Spi_Ethernet_Init 
- Spi_Ethernet_Enable 
- Spi_Ethernet_Disable 
- Spi_Ethernet_doPacket 
- Spi_Ethernet_putByte 
- Spi_Ethernet_putBytes 
- Spi_Ethernet_putString 
- Spi_Ethernet_putConstString 
- Spi_Ethernet_putConstBytes 
- Spi_Ethernet_getByte 
- Spi_Ethernet_getBytes 
- Spi_Ethernet_UserTCP
- Spi_Ethernet_UserUDP

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- SOFTWARE AND HARDWARE SOLUTIONS FOR EMBEDDED WORLD

CHAPTER 6

procedure Spi_Ethernet_Init(mac: ^byte; ip: ^byte; fullDuplex:byte);

Nothing.

This is MAC module routine. It initializes 

ENC28J60

controller. This function is

internaly splited into 2 parts to help linker when coming short of memory.

ENC28J60

controller settings (parameters not mentioned here are set to default): 

- receive buffer start address : 

0x0000.

- receive buffer end address : 

0x19AD

. 

- transmit buffer start address: 

0x19AE

. 

- transmit buffer end address : 

0x1FFF

. 

- RAM buffer read/write pointers in auto-increment mode. 
- receive filters set to default: CRC + MAC Unicast + MAC Broadcast in OR 

mode. 

- flow control with TX and RX pause frames in full duplex mode. 
- frames are padded to 

60

bytes + CRC. 

- maximum packet size is set to 

1518

. 

- Back-to-Back Inter-Packet Gap: 

0x15

in full duplex mode; 

0x12

in half duplex 

mode. 

- Non-Back-to-Back Inter-Packet Gap: 

0x0012

in full duplex mode; 

0x0C12

in 

half duplex mode. 

- Collision window is set to 63 in half duplex mode to accomodate some 
- 

ENC28J60

revisions silicon bugs. 

- CLKOUT output is disabled to reduce EMI generation. 
- half duplex loopback disabled. 
- LED configuration: default (LEDA-link status, LEDB-link activity).