Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD 데이터 시트

32072H–AVR32–10/2012

Changing LIN mode after initial configuration must be followed by a transceiver software reset in
order to avoid unpredictable behavior.

The LIN nodes baud rate is configured in the Baud Rate Generator Register (BRGR), 

, and 

All LIN frames start with a header sent by the master. As soon as the identifier has been written
to the Identifier Character field in the LIN Identifier Register (LINIR.IDCHR), CSR.TXRDY is
cleared and the header is sent. The header consists of a Break field, a Sync field, and an Identi-
fier field. CSR.TXRDY is set when the identifier has been transferred into the transmitters shift
register. An interrupt request is generated if IMR.TXRDY is set. 

The Break field consists of 13 dominant bits (the break) and one recessive bit (the break delim-
iter). The Sync field consists of a start bit, the Sync byte (the character 0x55), and a stop bit,
refer to 

. The Identifier field contains the Identifier as written to LINIR.IDCHR. The

identifier parity bits can be generated automatically (see 

Figure 25-27. Header Transmission

See also 

.

The USART stays idle until it detects a break field, consisting of at least 11 consecutive domi-
nant bits (zeroes) on the bus. The Sync field is used to synchronize the baud rate (see 

). IDCHR is updated and the LIN Identifier bit (CSR.LINIR) is set when the Identifier

has been received. An interrupt request is generated if the Lin Identifier bit in the Interrupt Mask
Register (IMR.LINIR) is set. The Identifier parity bits can be automatically checked (see 

). Writing a one to CR.RSTSTA will clear CSR.LINIR.

TXD

Baud Rate

 Clock

Start 

Bit

Write

LINIR

1

0

1

0

1

0

1

0

TXRDY

Stop

Bit

Start 

Bit

ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7

Break Field

13 dominant bits (at 0)

Stop

Bit

Break

Delimiter

1 recessive bit

(at 1)

Synch Byte = 0x55

LINIR

ID