Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD 데이터 시트
제품 코드
AT32UC3A3-XPLD
687
32072H–AVR32–10/2012
AT32UC3A3
27.8.2
USB Device Registers
27.8.2.1
Device General Control Register
Register Name:
UDCON
Access Type:
Read/Write
Offset:
0x0000
Reset Value:
0x00000100
• OPMODE2: Specific Operational mode
1: The UTMI transceiver is in the «disable bit stuffing and NRZI encoding» operational mode for test purpose.
0: The UTMI transceiver is in normal operation mode.
• TSTPCKT: Test packet mode
1: The UTMI transceiver generates test packets for test purpose.
0: The UTMI transceiver is in normal operation mode.
• TSTK: Test mode K
1: The UTMI transceiver generates high-speed K state for test purpose.
0: The UTMI transceiver is in normal operation mode.
• TSTJ: Test mode J
1: The UTMI transceiver generates high-speed J state for test purpose.
0: The UTMI transceiver is in normal operation mode.
• LS: Low-Speed Mode Force
1: The low-speed mode is active.
0: The full-speed mode is active.
This bit can be written even if USBE is zero or FRZCLK is one. Disabling the USBB (by writing a zero to the USBE bit) does not
reset this bit.
31
30
29
28
27
26
25
24
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
-
-
-
OPMODE2
15
14
13
12
11
10
9
8
TSTPCKT
TSTK
TSTJ
LS
SPDCONF
RMWKUP
DETACH
7
6
5
4
3
2
1
0
ADDEN
UADD