Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD 데이터 시트
제품 코드
AT32UC3A3-XPLD
755
32072H–AVR32–10/2012
AT32UC3A3
28.6.2.2
Trigger conditions
In addition to the SYNC signal, the software trigger and the RC compare trigger, an external trig-
ger can be defined.
ger can be defined.
The TIOA or TIOB External Trigger Selection bit in CMRn (CMRn.ABETRG) selects TIOA or
TIOB input signal as an external trigger. The External Trigger Edge Selection bit in CMRn
(CMRn.ETREDG) defines the edge (rising, falling or both) detected to generate an external trig-
ger. If CMRn.ETRGEDG is zero (none), the external trigger is disabled.
TIOB input signal as an external trigger. The External Trigger Edge Selection bit in CMRn
(CMRn.ETREDG) defines the edge (rising, falling or both) detected to generate an external trig-
ger. If CMRn.ETRGEDG is zero (none), the external trigger is disabled.