Linear Technology DC1216A-D - 100MHz PLL Synthesizer Reference Clock Source DC1216A-D DC1216A-D 데이터 시트

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LT1761 Series
15
1761sff
 APPLICATIONS INFORMATION
The LT1761 series are 100mA low dropout regulators with 
micropower quiescent current and shutdown. The devices 
are capable of supplying 100mA at a dropout voltage of 
300mV. Output voltage noise can be lowered to 20μV
RMS
 
over a 10Hz to 100kHz bandwidth with the addition of a 
0.01μF reference bypass capacitor. Additionally, the refer-
ence bypass capacitor will improve transient response of 
the regulator, lowering the settling time for transient load 
conditions. The low operating quiescent current (20μA) 
drops to less than 1μA in shutdown. In addition to the 
low quiescent current, the LT1761 regulators incorporate 
several protection features which make them ideal for use 
in battery-powered systems. The devices are protected 
against both reverse input and reverse output voltages. 
In battery backup applications where the output can be 
held up by a backup battery when the input is pulled to 
ground, the LT1761-X acts like it has a diode in series with 
its output and prevents reverse current fl ow. Additionally, 
in dual supply applications where the regulator load is 
returned to a negative supply, the output can be pulled 
below ground by as much as 20V and still allow the device 
to start and operate.
Adjustable Operation
The adjustable version of the LT1761 has an output voltage 
range of 1.22V to 20V. The output voltage is set by the 
ratio of two external resistors as shown in Figure 1. The 
device servos the output to maintain the ADJ pin voltage  
at 1.22V referenced to ground. The current in R1 is then 
equal to 1.22V/R1 and the current in R2 is the current in 
R1 plus the ADJ pin bias current. The ADJ pin bias cur-
rent, 30nA at 25°C, fl ows through R2 into the ADJ pin. 
The output voltage can be calculated using the formula in 
Figure 1. The value of R1 should be no greater than 250k 
to minimize errors in the output voltage caused by the 
ADJ pin bias current. Note that in shutdown the output is 
turned off and the divider current will be zero. Curves of 
ADJ Pin Voltage vs Temperature and ADJ Pin Bias Cur-
rent vs Temperature appear in the Typical Performance 
Characteristics.
The adjustable device is tested and specifi ed with the ADJ 
pin tied to the OUT pin for an output voltage of 1.22V. 
Specifi cations for output voltages greater than 1.22V will 
be proportional to the ratio of the desired output voltage 
to 1.22V: V
OUT
/1.22V. For example, load regulation for an 
output current change of 1mA to 100mA is –1mV typical 
at V
OUT
 = 1.22V. At V
OUT
 = 12V, load regulation is:
  (12V/1.22V)(–1mV) = –9.8mV
Bypass Capacitance and Low Noise Performance
The LT1761 regulators may be used with the addition of a 
bypass capacitor from OUT to the BYP pin to lower output 
voltage noise. A good quality low leakage capacitor is rec-
ommended. This capacitor will bypass the reference of the 
regulator, providing a low frequency noise pole. The noise 
pole provided by this bypass capacitor will lower the output 
voltage noise to as low as 20μV
RMS
 with the addition of a 
0.01μF bypass capacitor. Using a bypass capacitor has the 
added benefi t of improving transient response. With no 
bypass capacitor and a 10μF output capacitor, a 10mA to 
100mA load step will settle to within 1% of its fi nal value 
in less than 100μs. With the addition of a 0.01μF bypass 
capacitor, the output will stay within 1% for a 10mA to 
100mA load step (see LT1761-5 Transient Response in 
Typical Performance Characteristics section). However, 
regulator start-up time is proportional to the size of the 
bypass capacitor, slowing to 15ms with a 0.01μF bypass 
capacitor and 10μF output capacitor.
IN
1761 F01
R2
LT1761
OUT
V
IN
V
OUT
ADJ
GND
R1
+
V
V
R
R
I
R
V
V
I
nA
OUT
ADJ
ADJ
ADJ

¥
§
¦
´
µ 
   


o
1 22
1
2
1
2
1 22
30


 AT 25 C
OUTPUT RANGE  =  1.22V TO 20V
Figure 1. Adjustable Operation