Linear Technology LTC2449 8-/16-channel, High Speed 24-Bit Delta Sigma ADC DC742A DC742A 데이터 시트
제품 코드
DC742A
3
dc742af
DEMO MANUAL DC742A
EXPERIMENTS
INPUT NOISE
Solder a short wire from the CH0 to CH1. Ensure that the
buffer amplifiers are in their active region of operation by
either biasing the inputs to mid-supply with a 10kΩ to
10kΩ divider when the buffer amplifier is powered from
V
buffer amplifiers are in their active region of operation by
either biasing the inputs to mid-supply with a 10kΩ to
10kΩ divider when the buffer amplifier is powered from
V
CC
and ground, or tie the inputs to ground and connect
an external +7.5V/–2.5V supply to the AMP V– turret (JP1
and JP2 must be set to EXT.)
and JP2 must be set to EXT.)
Set the demo software to OSR32768 (6.8 samples per sec-
ond.) and check the 2X box. Noise should be approximately
0.04ppm of V
ond.) and check the 2X box. Noise should be approximately
0.04ppm of V
REF
(200nV.) Next, select different oversample
ratios. Measured noise for each oversample ratio should
be close to values given in the LTC2449 data sheet.
be close to values given in the LTC2449 data sheet.
COMMON MODE REJECTION
Tie the two inputs (still connected together from previous
experiment) to ground through a short wire and note the
indicated voltage. Tie the inputs to REF+; the difference
should be less than 5μV due to the 120dB CMRR of the
LTC2449.
experiment) to ground through a short wire and note the
indicated voltage. Tie the inputs to REF+; the difference
should be less than 5μV due to the 120dB CMRR of the
LTC2449.
This experiment requires an external power supply to the
buffer amplifier.
buffer amplifier.
If the common mode voltage is limited to GND + 0.25V to
V
V
CC
– 0.25V, this test may be performed with the amplifier
supplies set to ground and V
CC
.
INPUT NORMAL MODE REJECTION
The LTC2440’s SINC4 digital filter is trimmed to strongly
reject both 50Hz and 60Hz line noise when operated with
the internal conversion clock and oversample ratio 32768
(6.8 samples per second.) To measure input normal
mode rejection, connect COM to a 2.5V source such as
an LT1790-2.5 reference or a power supply. Connect any
other input (CH0 to CH15) to the same supply through a
10k resistor. Apply a 10Hz, 2V peak-to-peak sine wave to
the input through a 1μF capacitor.
reject both 50Hz and 60Hz line noise when operated with
the internal conversion clock and oversample ratio 32768
(6.8 samples per second.) To measure input normal
mode rejection, connect COM to a 2.5V source such as
an LT1790-2.5 reference or a power supply. Connect any
other input (CH0 to CH15) to the same supply through a
10k resistor. Apply a 10Hz, 2V peak-to-peak sine wave to
the input through a 1μF capacitor.
Select OSR32768 (6.8 samples per second) and 2
× mode
in the demo software and start taking data. The input noise
will be quite large, and the graph of output vs time should
show large variations.
will be quite large, and the graph of output vs time should
show large variations.
Next, slowly increase the frequency to 55Hz. The noise
should be almost undetectable in the graph. Note that the
indicated noise in ppm may still be above that of the data
sheet specification because the inputs are not connected
to a DC source.
should be almost undetectable in the graph. Note that the
indicated noise in ppm may still be above that of the data
sheet specification because the inputs are not connected
to a DC source.
Change the OSR to 16384 (13.75 samples per second;) the
noise will increase substantially, as the first notch at this
OSR is at 110Hz. Increase the signal generator frequency
to 110Hz, the noise will drop again.
noise will increase substantially, as the first notch at this
OSR is at 110Hz. Increase the signal generator frequency
to 110Hz, the noise will drop again.
HARDWARE SETUP
PWR GND: Power ground, connected to the power return
trace.
trace.
VCC: This is the supply for the ADC. Do not draw any
power from this point. External power may be applied to
this point after disabling the switching supply on DC590.
If the DC590 serial controller is being used, the voltage
must be regulated 5V only, as the isolation circuitry will
also be powered from this supply. See the DC590 quick
start guide for details.
power from this point. External power may be applied to
this point after disabling the switching supply on DC590.
If the DC590 serial controller is being used, the voltage
must be regulated 5V only, as the isolation circuitry will
also be powered from this supply. See the DC590 quick
start guide for details.
REF+, REF–: These turrets are connected to the LTC2449
REF+ and REF– pins. If the onboard reference is being used,
the reference voltage may be monitored from this point. An
REF+ and REF– pins. If the onboard reference is being used,
the reference voltage may be monitored from this point. An
external reference may be connected to these terminals if
JP3 and JP5 are configured for external reference.
JP3 and JP5 are configured for external reference.
Note: The REF+ and REF– terminals are decoupled to
ground with 0.1μF and 10μF capacitors in parallel. Thus
any source connected to these terminals must be able to
drive a capacitive load and have very low impedance at
DC. Examples are series references that require an output
capacitor and C-Load™ stable op amps such as the LT1219
and LT1368.
ground with 0.1μF and 10μF capacitors in parallel. Thus
any source connected to these terminals must be able to
drive a capacitive load and have very low impedance at
DC. Examples are series references that require an output
capacitor and C-Load™ stable op amps such as the LT1219
and LT1368.
CH0: CH15: These are the differential inputs to the LTC2449.
They may be configured either as single-ended inputs with
respect to the COM pin, or adjacent pairs may be configured
as differential inputs (CH0-1, CH2-3, etc.)
They may be configured either as single-ended inputs with
respect to the COM pin, or adjacent pairs may be configured
as differential inputs (CH0-1, CH2-3, etc.)