IBM Intel Xeon E7430 44E4470 데이터 시트
제품 코드
44E4470
Intel® Xeon® Processor 7400 Series Datasheet
31
Electrical Specifications
Notes:
1.
The V
CC_MIN
and V
CC_MAX
loadlines represent static and transient limits. Please see
for VCC
overshoot specifications.
2.
Refer to
for processor VID information.
3.
Refer to
for V
CC
Static and Transient Tolerance.
4.
The load lines specify voltage limits at the die measured at the VCC_SENSE and VSS_SENSE pins and the
VCC_SENSE2 and VSS_SENSE2 pins. Voltage regulation feedback for voltage regulator circuits must also
be taken from the processor VCC_SENSE2 and VSS_SENSE2 pins. Refer to the Voltage Regulator Module
(VRM) and Enterprise Voltage Regulator Down (EVRD) 11.0 Design Guidelines for socket load line
guidelines and VR implementation. Please refer to the appropriate platform design guide for details on VR
implementation.
5.
Icc values greater than 95 A are not applicable for the Ultra Dense Intel® Xeon® Processor 7400 Series.
6.
Icc values greater than 130 A are not applicable for the Rack Optimized Intel® Xeon® Processor 7400
Series.
Notes:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
V
IL
is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low
value.
3.
V
IH
is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high
value.
4.
This is the pull down driver resistance. Measured at 0.33*V
TT
. Refer to processor I/O Buffer Models for I/V
characteristics
5.
GTLREF should be generated from V
TT
with a 1% tolerance resistor divider. The V
TT
referred to in these
specifications is the instantaneous V
TT
.
6.
Specified when on-die R
TT
and R
ON
are turned off. V
IN
between 0 and V
TT
.
7.
This is the measurement at the pin.
Figure 2-4. V
CC
Static and Transient Tolerance Load Lines
V ID - 0.00 0
V ID - 0.05 0
V ID - 0.10 0
V ID - 0.15 0
V ID - 0.20 0
V ID - 0.25 0
0
5
10
1 5
20
25
30
3 5
40
45
5 0
55
60
6 5
7 0
75
80
8 5
90
95 10 0 1 05 110 11 5 1 20 125 13 0 1 35 1 40 145 15 0
Ic c [A ]
Vc
c
[
V
]
V
C C
M ax im um
V
C C
Ty pic al
V
C C
M inim um
Table 2-11. AGTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Typ
Max
Units
Notes
1
V
IL
Input Low Voltage
-0.10
0
GTLREF-0.10
V
2, 4, 6
V
IH
Input High Voltage
GTLREF+0.10
V
TT
V
TT
+0.10
V
3, 6
V
OH
Output High Voltage
V
TT
- 0.10
N/A
V
TT
V
4, 6
R
ON
Buffer On Resistance
7
9
11
Ω
5
I
LI
Input Leakage Current
N/A
N/A
+/-100
μA
7, 8