Intel ULV 383 LE80536VC0011M 데이터 시트

제품 코드

LE80536VC0011M

Mobile Intel

Celeron

Processor (0.18µ) in BGA2 and Micro-PGA2 Packages

283654-003 Datasheet

Tables

Table 1. New BGA2/Micro-PGA2 Signals .........................................................................12

Table 2. Removed BGA1/µPGA1 Signals .........................................................................13

Table 3. Clock State Characteristics .................................................................................16

Table 4. Mobile Intel Celeron Processor CPUID...............................................................17

Table 5. Mobile Intel Celeron Processor CPUID Cache and TLB Descriptors .................17

Table 6. System Signal Groups.........................................................................................18

Table 7. Recommended Resistors for Mobile Intel Celeron Processor Signals ...............19

Table 8. Mobile Intel Celeron Processor Absolute Maximum Ratings ..............................23

Table 9. Mobile Intel Celeron Processor Power Specifications ........................................24

Table 10. GTL+ Signal Group DC Specifications..............................................................25

Table 11. GTL+ Bus DC Specifications.............................................................................26

Table 12. Clock, APIC, TAP, CMOS, and Open-drain Signal Group DC Specifications ..27

Table 13. System Bus Clock AC Specifications................................................................28

Table 14. Valid Mobile Intel Celeron Processor Frequencies ...........................................29

Table 15. GTL+ Signal Groups AC Specifications ............................................................29

Table 16. CMOS and Open-drain Signal Groups AC Specifications ................................30

Table 17. Reset Configuration AC Specifications .............................................................31

Table 18. APIC Bus Signal AC Specifications ..................................................................31

Table 19. TAP Signal AC Specifications ...........................................................................32

Table 20. Quick Start/Deep Sleep AC Specifications .......................................................32

Table 21. Stop Grant/Sleep/Deep Sleep AC Specifications .............................................33

Table 22. BCLK Signal Quality Specifications ..................................................................40

Table 23. PICCLK Signal Quality Specifications...............................................................40

Table 24. GTL+ Signal Group Ringback Specification......................................................42

Table 25. GTL+ Signal Group Overshoot/Undershoot Tolerance at the Processor Core 43

Table 26. Non-GTL+ Signal Group Overshoot/Undershoot Tolerance at the Processor

Core ...................................................................................................................45

Table 27. Surface-mount BGA2 Package Specifications..................................................46

Table 28. Socketable Micro-PGA2 Package Specification ...............................................49

Table 29. Signal Listing in Order by Pin/Ball Number .......................................................53

Table 30. Signal Listing in Order by Signal Name ............................................................56

Table 31. Voltage and No-Connect Pin/Ball Locations .....................................................58

Table 32. Mobile Intel Celeron Processor Power Specifications ......................................59

Table 33. Thermal Diode Interface....................................................................................60

Table 34. Thermal Diode Specifications ...........................................................................60

Table 35. BSEL[1:0] Encoding ..........................................................................................66

Table 36. Voltage Identification Encoding .........................................................................74

Table 37. Input Signals......................................................................................................75

Table 38. Output Signals...................................................................................................76

Table 39. Input/Output Signals (Single Driver)..................................................................76

Table 40. Input/Output Signals (Multiple Driver) ...............................................................76

Table 41. PLL Filter Inductor Recommendations..............................................................78

Table 42. PLL Filter Capacitor Recommendations ...........................................................79

Table 43. PLL Filter Resistor Recommendations..............................................................79