Intel C2550 FH8065401488912 데이터 시트
제품 코드
FH8065401488912
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 1 of 3
Order Number: 330061-002US
39
Volume 2—Introduction and Product Offerings—C2000 Product Family
Terminology
DQ Descriptor
Queue
DUT
Device Under Test
DW
Double Word (4 bytes)
ECC
Error Correction Code
EEE
Energy Efficient Ethernet - IEEE 802.3az standard
EEPROM
Electrically Erasable Programmable Memory. A non-volatile memory directly accessible from the
host.
EHCI
Enhanced Host Controller Interface
EMI
Electromagnetic Interference
Enhanced Intel
SpeedStep
®
Technology
Allows the operating system to reduce power consumption when performance is not needed.
EOP
End of Packet
ESD
Electrostatic Discharge
Execute Disable Bit
The Execute Disable bit allows memory to be marked as executable or non-executable, when
combined with a supporting operating system. If code attempts to run in non-executable memory
the processor raises an error to the operating system. This feature prevents some classes of viruses
or worms that exploit buffer overrun vulnerabilities and improves the overall system security. See
the Intel
®
64 and IA-32 architectures software developer manuals for more detailed information.
FC Flow
Control
FCS
Frame Check Sequence
Firmware (FW)
Embedded code on the LAN controller that implements the NC-SI protocol and pass-through
functionality.
Flight Time
A term in the timing equation that includes the signal propagation delay, any effects the system has
on the driver TCO, plus any adjustments to the signal at the receiver needed to guarantee the
receiver setup time. More precisely, flight time is defined as the following:
• The time difference between a signal at the input pin of a receiving agent crossing the switching
voltage (adjusted to meet the receiver manufacturer conditions required for AC timing
specifications; i.e., ringback, etc.) and the output pin of the driving agent crossing the switching
voltage when the driver is driving a test load used to specify the driver AC timings.
Maximum and Minimum Flight Time – Flight time variations are caused by many different
parameters. The more obvious causes include the board dielectric constant variation, changes in
load condition, crosstalk, power noise, variation in termination resistance, and differences in I/O
buffer performance as a function of temperature, voltage, and manufacturing process. Some less
obvious causes include effects of Simultaneous Switching Output (SSO) and packaging effects.
Maximum flight time is the largest acceptable flight time a network experiences under all conditions.
Minimum flight time is the smallest acceptable flight time a network experiences under all
Maximum flight time is the largest acceptable flight time a network experiences under all conditions.
Minimum flight time is the smallest acceptable flight time a network experiences under all
conditions.
FS
Full-speed. Refers to USB.
Host Interface
RAM on the LAN controller shared between the firmware and the host, and used to pass commands
from the host to the firmware and responses from the firmware to the host.
HPC
High - Performance Computing
HS
High
-
speed. Refers to USB.
IIO
The Integrated I/O Controller. An I/O controller that is integrated in the processor die.
iMC
The Integrated Memory Controller. A Memory Controller that is integrated in the processor die.
Intel
®
64 Technology
64-bit memory extensions to the IA-32 architecture. Further details on the Intel 64 architecture and
the programming model are found at:
IPC
Inter-Processor Communication
IPG
Inter-Packet Gap
IPMI
Intelligent Platform Management Interface specification
Table 1-4.
Processor Terminology (Sheet 2 of 5)
Term
Description