Intel C2518 FH8065501516710 데이터 시트

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Intel
®
 Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
371
Volume 2—Platform Controller Unit (PCU)—C2000 Product Family
Soft Straps
Note:
* The Flash Image Tool Creation (FITC) SoC Strap Number is referenced in Table A-1 of the Intel
®
 
Atom™ Processor C2000 Product Family SPI Flash Programming Tools and Users Guide - document 
number 519715.
8
+ 20h
18
PCIe RP3
Disable
PCIe Root Port 3 (B0:D3) Disabled: 
1'b0 (false) - Enabled
1'b1 (true) - Disabled
Note:
Ensure these soft straps are set to match this selection.
• SoC Strap 0 PCIe RP3 (B0:D3) Disable
• SoC Strap 5 PCIe Lane Power Enable 8
• SoC Strap 5 PCIe Lane Power Enable 9
• SoC Strap 5 PCIe Lane Power Enable 10
• SoC Strap 5 PCIe Lane Power Enable 11
• SoC Strap 5 PCIe Lane Power Enable 12
• SoC Strap 5 PCIe Lane Power Enable 13
• SoC Strap 5 PCIe Lane Power Enable 14
• SoC Strap 5 PCIe Lane Power Enable 15
1'b0
8
+ 20h
19
PCIe RP4
Disable
PCIe Root Port 4 (B0:D4) Disabled: 
1'b0 (false) - Enabled
1'b1 (true) - Disabled
Note:
Ensure these soft straps are set to match this selection.
• SoC Strap 0 PCIe RP4 (B0:D4) Disable
• SoC Strap 5 PCIe Lane Power Enable 8
• SoC Strap 5 PCIe Lane Power Enable 9
• SoC Strap 5 PCIe Lane Power Enable 10
• SoC Strap 5 PCIe Lane Power Enable 11
1'b0
8
+ 20h
31:20
Reserved
Reserved
12’h0
Table 16-5. Flash Descriptor Soft Strap (Sheet 10 of 10)
FITC
SoC 
Strap
Number
FISBA
+
Offset
Bit 
Offset
Soft Strap Name
Description
Default