Intel E3815 FH8065301567411 데이터 시트
제품 코드
FH8065301567411
PCU – System Management Bus (SMBus)
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
4433
When programmed for a block write command, the Transmit Slave Address
(SMB_Mem_TSA), Host Command (SMB_Mem_HCMD) and Data 0 (SMB_Mem_HD0)
registers are sent. Data is then sent from the Host Block Data (SMB_Mem_HBD)
register; the total data sent being the value stored in the Data 0 (SMB_Mem_HD0)
register. On block read commands, the first byte received is stored in the Data 0
(SMB_Mem_HD0) register, and the remaining bytes are stored in the Host Block Data
(SMB_Mem_HBD) register. See section 5.5.7 of the System Management Bus (SMBus)
Specification, Version 2.0 for the format of the protocol.
(SMB_Mem_TSA), Host Command (SMB_Mem_HCMD) and Data 0 (SMB_Mem_HD0)
registers are sent. Data is then sent from the Host Block Data (SMB_Mem_HBD)
register; the total data sent being the value stored in the Data 0 (SMB_Mem_HD0)
register. On block read commands, the first byte received is stored in the Data 0
(SMB_Mem_HD0) register, and the remaining bytes are stored in the Host Block Data
(SMB_Mem_HBD) register. See section 5.5.7 of the System Management Bus (SMBus)
Specification, Version 2.0 for the format of the protocol.
Note:
For Block Write, if the SMB_Config_HCFG.I2C_EN bit is set, the format of the command
changes slightly. The SoC will still send the number of bytes (on writes) or receive the
number of bytes (on reads) indicated in the Data 0 (SMB_Mem_HD0) register.
However, it will not send the contents of the Data 0 (SMB_Mem_HD0) register as part
of the message. Also, the Block Write protocol sequence changes slightly: the Byte
Count (bits 27:20 in the bit sequence) are not sent - as a result, the slave will not
acknowledge (bit 28 in the sequence).
changes slightly. The SoC will still send the number of bytes (on writes) or receive the
number of bytes (on reads) indicated in the Data 0 (SMB_Mem_HD0) register.
However, it will not send the contents of the Data 0 (SMB_Mem_HD0) register as part
of the message. Also, the Block Write protocol sequence changes slightly: the Byte
Count (bits 27:20 in the bit sequence) are not sent - as a result, the slave will not
acknowledge (bit 28 in the sequence).
Block Write–Block Read Process Call
The block write-block read process call is a two-part message. The call begins with a
slave address and a write condition. After the command code the host issues a write
byte count (M) that describes how many more bytes will be written in the first part of
the message. If a master has 6 bytes to send, the byte count field will have the value 6
(0000 0110b), followed by the 6 bytes of data. The write byte count (M) cannot be 0.
slave address and a write condition. After the command code the host issues a write
byte count (M) that describes how many more bytes will be written in the first part of
the message. If a master has 6 bytes to send, the byte count field will have the value 6
(0000 0110b), followed by the 6 bytes of data. The write byte count (M) cannot be 0.
The second part of the message is a block of read data beginning with a repeated start
condition followed by the slave address and a Read bit. The next byte is the read byte
count (N), which may differ from the write byte count (M). The read byte count (N)
cannot be 0.
condition followed by the slave address and a Read bit. The next byte is the read byte
count (N), which may differ from the write byte count (M). The read byte count (N)
cannot be 0.
The combined data payload must not exceed 32 bytes. The byte length restrictions of
this process call are summarized as follows:
this process call are summarized as follows:
•
M ≥ 1 byte
•
N ≥ 1 byte
•
M + N ≤ 32 bytes
The read byte count does not include the PEC byte. The PEC is computed on the total
message beginning with the first slave address and using the normal PEC
computational rules. It is highly recommended that a PEC byte be used with the Block
Write-Block Read Process Call. Software must do a read to the Host Command
(SMB_Mem_HCMD) register to reset the 32 byte buffer pointer prior to reading the
Host Block Data (SMB_Mem_HBD) register.
message beginning with the first slave address and using the normal PEC
computational rules. It is highly recommended that a PEC byte be used with the Block
Write-Block Read Process Call. Software must do a read to the Host Command
(SMB_Mem_HCMD) register to reset the 32 byte buffer pointer prior to reading the
Host Block Data (SMB_Mem_HBD) register.
Note that there is no STOP condition before the repeated START condition, and that a
NACK signifies the end of the read transfer.
NACK signifies the end of the read transfer.
Note:
The SMB_Mem_AUXC.E32B bit in the Auxiliary Control register must be set when using
this protocol.
this protocol.